SAMD21: setting RTC COMP clears READREQ.RCONT (!?!)

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This is related to:

 

   https://community.atmel.com/foru...

 

It appears that simply setting the RTC COMP register using the ASF4 api clears the RTC.READREQ.RCONT bit.

static inline void hri_rtcmode0_write_COMP_COMP_bf(const void *const hw, uint8_t index, hri_rtcmode0_comp_reg_t data)
{
	uint32_t tmp;
	RTC_CRITICAL_SECTION_ENTER();
	tmp = ((Rtc *)hw)->MODE0.COMP\[index\].reg;
	tmp &= ~RTC_MODE0_COMP_COMP_Msk;
	tmp |= RTC_MODE0_COMP_COMP(data);
	((Rtc *)hw)->MODE0.COMP\[index\].reg = tmp;   // <= RTC.READREQ.RCONT gets cleared here
	hri_rtc_wait_for_sync(hw);
	RTC_CRITICAL_SECTION_LEAVE();
}

I should mention that in my case, the CPU is being clocked at 8MHz and the RTC at 32768Hz (from OSCULP32K). 

 

Is this documented behavior?  Or is it a firmware bug?

 

This topic has a solution.
Last Edited: Sun. Jul 26, 2020 - 11:19 AM
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Update: I've verified the same behavior on an MPLAB X example (using the Harmony SDK) and submitted a bug report to Microchip.

 

It would be interesting to find out if it affects any other of the SAMxnn family of processors.  If anyone wants to test it out, here's the salient code for MPLAB / Harmony:

 

printf("DSU->DID = %lx\r\n\r\n", DSU_REGS->DSU_DID);
RTC_Initialize();

// Set and print the RCONT bit
RTC_REGS->MODE0.RTC_READREQ |= RTC_READREQ_RCONT_Msk;
printf("Before setting COMP, RTC.READREQ & RCONT = %04x\r\n",
       RTC_REGS->MODE0.RTC_READREQ & RTC_READREQ_RCONT_Msk);

// Set RTC_COMP register.  Should not modify REQDREQ.RCONT bit:
RTC_REGS->MODE0.RTC_COMP = 0x0;
while((RTC_REGS->MODE0.RTC_STATUS & RTC_STATUS_SYNCBUSY_Msk) == RTC_STATUS_SYNCBUSY_Msk) {
    /* Wait for Synchronization after writing Compare Value */
}

// Print the RCONT bit again
printf(" After setting COMP, RTC.READREQ & RCONT = %04x\r\n",
       RTC_REGS->MODE0.RTC_READREQ & RTC_READREQ_RCONT_Msk);

 

This reply has been marked as the solution. 
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Solved.  If you read the fine print carefully, section 19.8.4 of the SAM D21/DA1 Family datasheet says:

[RCONT] is cleared when an RTC register is written.

This is different behavior than the RTC module in other members of the SAM family of processors.  Also note this:

For the continuous read mode, RREQ bit is required to be set once the RCONT bit is set.

Therefore, to enable continuous reads of RTC COUNT on the SAM D21, any time you modify the RTC COMP register, you must re-initialize both RCONT and RREQ along these lines:

  RTC_REGS->MODE0.RTC_COMP = <comparison value>;
  while((RTC_REGS->MODE0.RTC_STATUS & RTC_STATUS_SYNCBUSY_Msk) == RTC_STATUS_SYNCBUSY_Msk) {
    // Wait for Synchronization after writing Compare Value
  }
  // Re-enable continuous read
 RTC_REGS->MODE0.RTC_READREQ |= RTC_READREQ_RCONT_Msk;
 RTC_REGS->MODE0.RTC_READREQ |= RTC_READREQ_RREQ_Msk;

 

Last Edited: Sun. Jul 26, 2020 - 11:21 AM