samd21 PLL vs DFLL

1 post / 0 new
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

In my application my samd21 is in standby sleep most of the time, only waking up to perform some operation and then go right back to sleep.  I currently have my clock configured using the 32 kHz external oscillator (XOSC32), feeding DFLL at 48 MHz.  I am curious the tradeoff if I use the PLL sourced from the external 32 kHZ oscillator running at 48 MHz.  I have anecdotal read that the PLL is more stable but takes more power.  Is the PLL more stable?