SAMB11 and SPI

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I have a problem with the SPI interface of the SAMB11. I connected a flash memory with SPI interface to the SAMB11. I have chosen for SPI0 and configured it with MUX5 so I use GPIO pin 16 - 19 for this purpose. I can write some bytes to the memory with functions of the ASF library. When I want to read back the memory content I saw the correct data bytes on the MISO line with a logic analyzer but the SPI RX DATA register gives always as result FF, even when I connect MISO to GND (with the Debugger I can see that bit 4 of DATA register of GPIO1 is zero when connected with GND and 1 when connected with VCC).

Has somebody experiences with SPI and SAMB11 or maybe another SAMD controller? I have configured the SAMB11 as SPI master, then I look at the SPI driver of the ASF (spi_init function in spi.c file) I saw that when I  selected the SAMB11 as master, every pin of the SPI bus is configured as output, so I think that is the first problem.

Part of spi_init function in spi.c:

	/* Set the pinmux for this spi module. */
	for(idx = 0; idx < 4; idx++) {
		if (config->pin_number_pad[idx] != PINMUX_UNUSED) {
			if (config->mode == SPI_MODE_MASTER) {
				config_gpio.direction = GPIO_PIN_DIR_OUTPUT;
			} else if (config->mode == SPI_MODE_SLAVE)  {
				config_gpio.direction = GPIO_PIN_DIR_INPUT;
			}
			gpio_pin_set_config(config->pin_number_pad[idx], &config_gpio);
			gpio_pinmux_cofiguration(config->pin_number_pad[idx], \
						(uint16_t)(config->pinmux_sel_pad[idx]));
		}
	}

 

My configuration function:

void initSPI(void)
 {
	spi_get_config_defaults(&spiConfig);

	spiConfig.mode = SPI_MODE_MASTER;
	spiConfig.data_order       = SPI_DATA_ORDER_MSB;					// MSB first
	spiConfig.transfer_mode    = SPI_TRANSFER_MODE_0;
	spiConfig.clock_source     = SPI_CLK_INPUT_0;
	spiConfig.clock_divider    = 9;										//	Clock divider  (Formula: baud_rate = ((clock input freq/clock_divider+1)/2))
																		//  (For Example: if clock source is CLOCK_INPUT_0 then
																		//  ((26000000/(129+1))/2) = 100000 bps)

	spiConfig.pin_number_pad[0] = PIN_LP_GPIO_16_MUX5_SPI0_SCK;
	spiConfig.pin_number_pad[1] = PIN_LP_GPIO_17_MUX5_SPI0_MOSI;
	spiConfig.pin_number_pad[2] = PIN_LP_GPIO_18_MUX5_SPI0_SSN;
	spiConfig.pin_number_pad[3] = PIN_LP_GPIO_19_MUX5_SPI0_MISO;

	spiConfig.pinmux_sel_pad[0] = MUX_LP_GPIO_16_MUX5_SPI0_SCK;
	spiConfig.pinmux_sel_pad[1] = MUX_LP_GPIO_17_MUX5_SPI0_MOSI;
	spiConfig.pinmux_sel_pad[2] = MUX_LP_GPIO_18_MUX5_SPI0_SSN;
	spiConfig.pinmux_sel_pad[3] = MUX_LP_GPIO_19_MUX5_SPI0_MISO;

	spi_init(&spi_master_instance, SPI0, &spiConfig);

	struct spi_slave_inst_config slave_dev_config;
	slave_dev_config.ss_pin = PIN_LP_GPIO_18;
	slave_dev_config.address_enabled = false;
	slave_dev_config.address = 0;
	spi_attach_slave(&slave, &slave_dev_config);

	spi_register_callback(&spi_master_instance, callback_spi_master_read, SPI_CALLBACK_BUFFER_RECEIVED);
	spi_register_callback(&spi_master_instance, callback_spi_master_write, SPI_CALLBACK_BUFFER_TRANSMITTED); 

	spi_enable_callback(&spi_master_instance, SPI_CALLBACK_BUFFER_RECEIVED);
	spi_enable_callback(&spi_master_instance, SPI_CALLBACK_BUFFER_TRANSMITTED);

	spi_enable(&spi_master_instance);
 }

 

 

But even when I changed it that the MISO pin (LP_PIN_GPIO_19) is configured as input I get always as result in the SPI_RX_DATA register FF.

For reading the bytes of the memory I use the function spi_read_buffer_wait. In the comment of this function it says the following: \note Receiver must be enabled in the configuration. What do they mean by this: for me it is enable SPI, but maybe there's a separate way to enable the receiver, but how?

For me it is very difficult to find out how this controller is working without the help of a verbose datasheet. Even the examples that Atmel gives for SPI, it only gives a demonstration with writing to a device, not reading.

In the ASF library file I read a status register with FIFO information, but is there a FIFO in this SAMB11 chip or is it a shift register?

 

This is my first experience with Atmel controllers but I think the documentation is very bad for this chip, even when I compare the library files with the datasheet of for example SAMD21 I see a lot of differences in registers etc.

 

 

 

Last Edited: Wed. Nov 30, 2016 - 08:11 PM