Il have built a perpetual clock with an Atmega 328P , crystal is a 4,194304 MKz with a small adjustable cap on one side to slightly modify the frequency, all code is assembly.
Timer1 is used in fast PWM mode(15) with prescaler set to 64 and OCRIAH/L set to 65533 to compensate for gross crystal error.
The problem is :
If i adjust the cap then output period change only by step of half clock period instead of a continuous change as expected, and so for thermal shift, more the shift changes always by step of magnitude equal to a multiple of half clock period (119ns).
It is clear that the periodmeter (80MHz reference clock) as no knowledge of the clock period of the AVR so what is measured is actual.
Test is made with only basic initialisation of timers( i used also the Timer0 in CTC mode for debug with 8hz output which is also unstable but more randomly).
Atmega is supplied by a 4,8V battery and bypassed by 100nf plastic cap and electrolityc cap.
Does somebody already got this problem ?