PWM on Mega88

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Hi all ,
I am wanting to implement two PWM outputs , on ATMega88 . The PWM frequency in both cases is same , and I want to set it as 500 Hz . Then , ( since it is a DAC application ) , depending on the need , I want to set the OCR register , thereby getting a constant frequency pulse train with the duty cycle variable .
I also desire full 16 bit resolution on the duty cycle . Can it be done ?

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OP wrote:
Can it be done ?

The answer is "no" if I'm not mistaken: Since you want a PWM with 16-bit resolution at 500 Hz you need a timer that runs at 2^16 * 500 = 32768000 Hz = 32.768 MHz. No AVR runs at that frequency.
Lowering your resolution to 15 bits would be doable witn an AVR clock frequency of 16.384 MHz. This is in range for a ATmega88 @ 4.5-5.5 volts, as per the first page of the data sheet it should be able to run up to 2 MHz under those conditions.

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After further perusal of the datasheet , this is what I plan to do :
1. Use the ATMega88 at 20 MHz @ 5.0 volts , as per the datasheet first page .
2. Define PB1 and PB2 as output pins.
3. Select Fast PWM mode for timer 1.
4. Set the TOP value in ICR1 to get the PWM frequency of 500 Hz.
5. With this TOP value , if resolution acheived is >= 15 bits , settle for it .
5. Set some initial value in OCR1 and OCR2 to get 50 % duty cycle , on each output i.e. PB1 and PB2.
6. Once every while , based on the reading of the ADC , change the OCR1 and OCR2 , to get desired duty cycle on the PB1 and PB2 .

Does it sound..well..sound ?
My doubt is still whether one 16 bit timer can be shared between two outputs ?
Please no RTFM responses , as I am very new to AVR and need all the help I can get.....

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Quote:

Does it sound..well..sound ?

:)

Yes, I think so. The below is out of memory, and a "in-brain dry run" from the data sheet info, so double check what I say:

You run the AVR at 20 MHz. You feed Timer/Counter1 this clock, ie. "No Prescaling" CS12..CS10 = 001 (see table 13-5 p 131 in the data heet).

You set the timer to run in "Fast PWM Mode" with the TOP value in ICR1 (mode 14, WGM13..WGM10 = 1110, table 13-4 p 130). Set ICR1 to 32767 to get 15 bit resolution. Applying the formula on p 121 gives you a PWM frequency of 610 Hz.

You will have access to two PWM output on pins OC1A (PORTB1, pin 15 on a PDIP package) and OC1B (PORTB2, pin 16 on a PDIP package). These pins have several alternate functions that you will loose by using them as PWM outputs (see table 10-3 p 71).

You set up OC1A for PWM by setting COM1A1..COM1A0 to 11 (table 13-2 p 128). You'll also need to set the corresponding bits of DDRB so that these pins becomes outputs.

The above settings will make the timer count from zero to TOP (32767) where it will wrap back to zero. When the timer matches the value in the OCR1A register the OC1A output will go high, when the timer wraps from 32767 to zero the OC1A output will go low. Substitute with OCR1B and OC1B for the second PWM channel.

You say you want this for a D/A application. I'm no "analogue guy" but I wonder what filter you would apply to a 610 Hz PWM signal to get a nice, stable analogue signal at the other end. Maybe someone who is more at home with their R's, C's and L's can enlighten us both?

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"Some questions have no answers."[C Baird] "There comes a point where the spoon-feeding has to stop and the independent thinking has to start." [C Lawson] "There are always ways to disagree, without being disagreeable."[E Weddington] "Words represent concepts. Use the wrong words, communicate the wrong concept." [J Morin] "Persistence only goes so far if you set yourself up for failure." [Kartman]

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The filter is a simple Sallen-Key filter , with a cut-off frequency at 10 Hz. SInce the PWM frequency is 50 times more than this cut-off frequency , I should see very little PWM ripple on the output DC signal .
And Johan , Thanks ! :D

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PWM acheived as desired ! Works as advertised !