port i/o on xmega parts

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I finally have some xmega128A1 parts on the way! I'm working on my first design and have to say that the documentation and examples are way better than I expected for something that has been so hard to get up to now.

My question is: are the columns in the A1 manual datasheet regarding alternate pin functions exclusive with regards to the columns? In other words, if I use the SRAM ALE1 EBI configuration column for mapping port H to SRAM, can I still use the "blank" fields in that column for general I/O (such as PH3)?

Sorry if this is already answered in an obvious way in the datasheet.

The organization and functionality of this part appears to be the result of the most well thought-out Engineering of an MCU ever.

Very exciting. I can't wait to get started.