PLL for ATTINY85

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Hi all,

I am doing a project that involves the ATTINY85. So far, all my AVR clock input is either the built-in RC or external crystal.

What does it mean when the clock input for the ATTINY85 is "PLL Clock:..."? See image attached. Does that mean it does PLL whatever crystal I put in????

If you go to http://www.engbedded.com/fusecalc/ and select the ATTINY85 and use the 0xE1 (low byte) and 0xDD (high byte) as fuse bytes, you will see what I mean.

According to the datasheet:

"6.1.5 Internal PLL for Fast Peripheral Clock Generation - clkPCK
The internal PLL in ATtiny25/45/85 generates a clock frequency that is 8x multiplied from a source input. By
default, the PLL uses the output of the internal, 8.0 MHz RC oscillator as source. Alternatively, if bit LSM of
PLLCSR is set the PLL will use the output of the RC oscillator divided by two. Thus the output of the PLL, the fast
peripheral clock is 64 MHz. The fast peripheral clock, or a clock prescaled from that, can be selected as the clock
source for Timer/Counter1 or as a system clock. See Figure 6-2. The frequency of the fast peripheral clock is
divided by two when LSM of PLLCSR is set, resulting in a clock frequency of 32 MHz. Note, that LSM can not be
set if PLLCLK is used as system clock."

I can run the ATTINY85 even to 64Mhz? No way!

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A old discussion on that subject: High Frequency PLL Clock, oh really?