This is my second PCB prototype and and I would like to get some feedback on it. Basically there is a BLE113 to send receive BLE commands. These commands get transmitted via UART to an ATmega328p. Furthermore the Atmega can control a DC motor. The first one I made behaved as expected but now I added decoupling caps, an H-bridge and changed some other things. There is a copper pour on the bottom which is the ground plane. VCC is 5V and VDD is 3.3V. My goal is for this PCB to be as robust as possible while not really caring about budget constraints. I've read the EMC Design Considerations note (http://www.atmel.com/images/doc1619.pdf) and Hardware Design Considerations (http://www.atmel.com/Images/Atmel-2521-AVR-Hardware-Design-Considerations_ApplicationNote_AVR042.pdf) as well as a lot of other forum posts on good design. It would be nice to get some feedback from the AVR community so if you have any remarks please let me know (and no need to be sparse). What I personally don't like about the current design is that I have too many traces on the ground plane. I also I have a couple of questions:
1) The AVR EMC Design Considerations note describes a circuit for an external reset button (page 15) which contains a diode and cap. Should I use this setup for all resets or only for the ATmega? On the BLE113 for instance I implemented what I found in its datasheet and this does not contain a diode and a cap. Would it be better to add this here as well?
2) I have a big cap (470uF) at the power supply. I used this value because it seems to be common but I'm not sure whether that's a good value for my design. Sometimes I also see 4x100nF caps in parallel at the power supply. Which one is better for my design?
3) For the ATmega power decoupling I use an LC for each VCC and then one for AVCC. Can't I just use one LC for both VCC's? Also AVCC comes after the LC from VCC, is this good or could it just come directly off my voltage regulator? Also for BLE113 I just use C (no L) because thats how it is in the datasheet.
4) I have a lowpass filter for reading analog inputs with cutoff frequency fADC/2 (from datasheet). Should I also have a filter on my UART signals?
5) I have two 5V voltage regulators on the PCB, 1 for the DC motor and 1 for the ATmega. Could I get by with using only 1 for both atmega and DC? Also, should the ATmega net and the DC motor net each get there own "big" cap?
6) My trace width for power is 0.024in and for all the rest 0.012in (saw these values in a tutorial). Is this ok? Seems like big traces to me.
7) I read somewhere (http://electronics.stackexchange.com/questions/15135/decoupling-caps-pcb-layout/15143#15143) that it’s better to have a local power net for the ATmega (for any uC really) and have only one connection between this local net and the ground (with a via) and power planes. This would supposedly limit radiation and prevent the ground plane from becoming a patch antenna. I’m not sure about this though so I didn’t implement this on the PCB, any thoughts?
Thanks in advance!