Parellel or SPI

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#1
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Hi Everyone,

I'm trying to choose a memory with at least 32MB, but I need to be able to access it as fast as possible with my XMega128A1. Now my initial thoughts are to go with an SPI memory (http://www.spansion.com/datashee...), but I think by using DMA, I should be able to write and read from a parellel memory much faster.
(http://www.spansion.com/datashee...)

Now I'm not sure if my calculations are correct :oops: . I think that if we take the SPI memory for example.
Its clock rate is approx. 100MHz(to make calculations easier :)) which is equal to .01uS

Since I have to write 8 bits command then 24 bit address and then read/write 8 bit data that is 40 clock cycles. Therefore it will take .4uS to get a byte of data. So 8bit/.4uS = 20Mbit/s is the rate to get data for the SPI memory.

I'm still looking into how to calculate the rate for teh parellel memory, but does this look correct so far?

What's your take on parellel memory vs SPI memory when working with AVR chips.

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Why not hook it to the external memory interface? Access times are then minimal.

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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As the information you are storing has to originate somewhere I'd start by considering its data rate. Maybe you don't NEED to tie up a full parallel bus after all.

BTW what has this got to do with the GCC toolchain? (subject of this forum)

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theusch,

I thought the the Xmega interface was only good for 16M. The O/P is looking for 32M. Do you think it is possible to page out the external RAM?

A

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Thanks for the replies so far.

Theusch,

Is the EBI faster than the DMA? Thought it would be the opposite way around.

Clawson,

The data is going to come from either UARTs of the MCU. One being connected to the PC via ft232.
And your completely correct, wrong spot for post, can you please move it :oops:

I also figured since the EBI looks like its for SRAM and SDRAM that I wouldn't try to hook the memory up to it.

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I cannot move it - I don't have rights here.

OK so data is coming in over the UART - at what baud rate? Considering that I guess it's going to be something like 115,200 and that an SPI on any AVR can easily do 1MHz..2MHz then I would have thought the speed of access to the memory was immaterial myself. YMMV.

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Yep 115k, I was planning on running the SPI at 16MHz, I think thats the highest rate I can get it to. 32MHz divided by 4 and SPI has the double speed thingy.

My main question wasn't regarding just the speed of the SPI, I was trying to get a comparison on the Speed of SPI memory vs the speed of Parallel memory.

Any thoughts?

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But you miss the point. If you use 115,200 baud then bits are arriving at about 100kHz so you don't need a memory technology that operates at 16MHz or 4MHz or 2MHz or 1MHz or even 0.5MHz. As long as it can do a bit over the 0.1MHz to "keep up" then that is fine. So the consideration of whether a 2MHz SPI of an 8/16MHz parallel interface is needed is basing your decision on the wrong criterion. Both can EASILY keep up - the real question is "how many pins can I afford to use?"

Cliff

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I have not looked at any actual RAM chips, but at a swift guess:
32MB of memory will have 25 address lines and 8 data lines. At least 8 of these lines may be multiplexed. But it still uses a few pins.
32MB at 115kbaud is going to take 49 minutes to access. I would presume you will have some sort of protocol overhead too.

I would go for the SPI. In theory the XMega can do the SPI completely in parallel with the other sub-systems. You may well be able to start it off, and continue processing with no use of your cpu cycles at all.

You should be able to test this theory out with the XPLAIN board.

David.

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Ahh... I see what your saying. Well my main timing part real comes when its memory to micro. I want to be able to read from the memory as fast as possible. I do understand there is limitations in how fast I can read the data from the UART.

Sorry, if I not making myself clear enough :(

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OK, then turn the question round - when you are reading from the memory to the micro where does the data go to from there? Again the bandwidth limit may be the consuming process and not the memory access time.

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Quote:

The O/P is looking for 32M.

Ooops--I thought I read 32k.

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Quote:
Is the EBI faster than the DMA? Thought it would be the opposite way around.

DMA is subsystem inside the XMega that can move data from a source to a destination without CPU intervention. In itself it has nothing to do with EBI, which is a system that allows external memory devices to be connected.

You might be confused over 'direct memory access' which just means the main processor does not participate in the actual moving of the data (e.g load data in register, store data from register to memory, increment pointers, check if enough data has been moved).

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Thanks for the clarification jay.

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The same factors apply when you move data to the PC. Then, the key question is: what is your data rate out of the micro? If it is still UART-based, you have exactly the same numbers to work with.

If its USB or ethernet, then its a different ballgame. If USB, don't be fooled by high speed vs full speed, USB2, what-ever. Nothing achieves the full bit rate because USB has a very large inherent overhead. If its an FTDI adapator chip, it still has to be pumped through a UART. If if is one of the Atmel USB devices, then ask Dean Camera about realistic though-puts. It will be a lot slower than you would like.

Jim

 

Until Black Lives Matter, we do not have "All Lives Matter"!

 

 

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The data is just being used by the micro and my LCD,once stored I just use that information to display various things, based on certain cituations (btn presses, etc.) Thats why I believe the speed will be based on how fast I can read a spi memory vs parallel memory

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Quote:

The data is just being used by the micro and my LCD,once stored I just use that information to display various things, based on certain cituations (btn presses, etc.) Thats why I believe the speed will be based on how fast I can read a spi memory vs parallel memory

Do what? If the data is destined for output on an LCD it seems very likely that the ultimate consumer is going to be a human being. Given that the human brain and eyes can only perceive a display change at the rate of 15 times per second or less I'd have said you'd still have time to retrieve the data if it was being stored on the positions of wooden cogs in a facsimile of the original Babbage analytical engine. The speed of access to the memory doesn't matter on either write or read as the fastest thing you have happening there is the 115,200 baud reception (and we don't know if that's a continuous datstream or whether it's sporadic in which case there'd be time for even slower memory to be used).

Cliff

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By my calculations you can read/write an SPI memory, write to a character LCD as fast as a 115200 baud link can supply them.

And of course all young people can read an LCD that is updated that fast. After all 32M characters in 48 minutes is only reading 5 Bibles.

David.