On an AVR application I have connected some other parts digitally, memory with parallel address/data bus and also parts with serial peripheral interface (SPI). I am talking about signal lines with a few MBit/s (not supply paths or something like this).
I am wondering, which boundary conditions are important when rooting tracks on the PCB.
I assume that there is only a low DC current flowing (nearly 0), but due to high speed communication on the lines there is a certain AC current (driving the capacitive and inductive part of the line).
1. What is the best relation between track and gap width? 50/50?
In the boundaries the PCB manufacturer gives me, I have several possibilities to choose the track (=wire) and gap (=clearance) size.
Let's say I have a 25mil=0.635mm rooting grid.
I can choose 8mil track width, which will result in 17mil for space inbetween. (I am assuming that I have an 8bit data / 16bit address bus with a lot of lines side by side.)
Or 15mil for the track, and 10mil space.
Or 12mil for the track, and 13mil space.
Is there any need to introduce a higher wire resistance (by smaller tracks), the higher the data rate gets (e.g. to attenuate reflections)?
By this I would also reduce the crosstalk, since the gap is bigger...
Or is the bigger track the better one (lower resistance)?
2. Which via types do you prefer for such signal paths?
a) Round? (Maybe "smooth", probably less reflections)
b) Rectangular? (Lower resistance? Quality normally higher?)
c) Octagon? (Compromise between Round and Rectangular)
(Sorry, because this is more a general electronic question, but the AVR forum is the best I know! But I think the line driving capability of an AVR is an issue. Enough flattery...)