Parallel analogue traces and return paths

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G'day,

 

My PCB makes use of an 8-channel DAC, the 8 outputs of which terminate at a 2x4 2.54mm pitch through hole header. I've attached a screenshot of the DAC circuit and indicative analogue output traces below. I've segmented these components as much as possible from other components on the board (4-layer board with SIGNAL-GND-VCC-SIGNAL stack); these components and traces are on the bottom side of the PCB. Note that the trace width and clearance parameters shown below are the default values in KiCAD; I've only laid them out as shown below to provide context.

 

 

A couple of questions/clarifications:

 

  1. What's the best way to minimise noise and potential coupling (with nearby digital signals) in these analogue traces? Should I run guard traces between each of the analogue traces, only connecting each guard trace to the common GND plane at the DAC?
  2. More broadly, how should I approach management of return paths?
  3. I've purposefully positioned the DAC (and associated components) on the very edge of the PCB. Am I better off moving these components closer to the header to minimise the analogue trace length, or is increased distance of the analogue circuit components from other/digital components more important?
  4. Is there a standard trace width and spacing I should consider for these traces? The current default is 0.254mm width with 0.254mm spacing/clearance.

 

Any input will be greatly appreciated as always!

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I would make the analog lines shorter by moving the DAC to be next to (or near to)  the 2x4 header.  I suspect that the analog voltages coming out of the DAC are too low in frequency to  be affected by the close spacing of the traces.   

If this were a digital circuit with 10+MHz pulses, then the closeness of the traces might cause the signal edges on one trace to induce an inductive spike (from the magnetic field created around the trace when signal transitions between VCC to GND in a few nanoseconds) in the neighboring trace.

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Thanks Simonetta, much appreciated. These will definitely be low frequency signals, so I think your justification is sound. I'm happy to move the circuit closer to the header, as now that I think about it, there won't be any signals or components between the right edge of the analogue circuit and the edge of the board, so a degree of separation will still be maintained.

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Not only frequency, but edge rate. Fast edges = good coupling. I've been caught by that one a few times. How about coupling between the analog signals?

 

You're using a four layer pcb, so 6thou track and space is common, 4 thou and less is usually more special. (thou = thousands of an inch. 39.39thou to the millimetre or round up to 40 to the millimetre). Obviously, track size depends on the current you expect.

 

The analog can't be too critical, as you've not put a gnd on the connector as well, thus the gnd reference has to go the long way via other tracks. You've not told us much about what the analog connects to - there's no protection on your board and your signals may radiate.

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Thanks Kartman. Coupling between analogue signals is certainly a consideration. I'm fortunate that I've got a considerable amount of room to route these traces, so can add significant spacing between each trace as required.

 

I've used 6mil elsewhere on the board, so won't have an issue with that size. The current source on each channel is 10mA max.

 

My apologies, I oversimplified the physical connector. The connector certainly does contain GND pins, one for each of the 8 analogue outputs (see below).

 

 

The intention is for each analogue output to be available as a complete signal/GND pair. As such, would it be better to match a signal pin with a GND pin (i.e. each pin on the left of the connector is GND, each adjacent pin on the right is its analogue signal 'pair')?

Last Edited: Wed. Nov 7, 2018 - 01:54 AM
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First, even though those are low frequency signals, do not overlook coupling between the analog channels. I would put a ground  trace between every signal trace. Long traces mean more chance for pickup AND cross-coupling, so  move the ADC closer to the connector. Make sure that you have a good ground under those traces. Ground plane and ground isolating traces in a compact system will do a lot to reduce analog noise.

 

In the digital system, do you have control over many or most of the digital signals? If so, turn them off when a conversion is running. You do not care about digital-analog cross-talk at other times but you DO when a conversion is happening. Keep the digital traces as far away as you can. If they MUST cross, do so at right angles to minimize the overlapping area (coupling capacitance). Use wider ground traces at the outside edges of the analog trace array; that will help some.  

 

It does not appear that you have high current digital signals on that board (yet). Relays, motors, and such can produce problems in ways that you will have a hard time imagining. 

 

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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I would put a ground  trace between every signal trace.

+1

Make sure that you have a good ground under those traces.

+2

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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Thanks everyone. Here's the updated layout. I've changed the ordering of the header connector, and have included a GND trace for each analogue signal. Is the via connection to the GND plane of each of the GND traces correct? Note the CoM connector on the top layer (red); all the pads the analogue signals pass over are NC, so I don't think there are any issues there. The only issue are the LVDS display differential pairs (red traces immediately right of the header connector on the top layer); I've tried to utilise perpendicular intersections as much as possible.

 

As for the "good ground under those traces"; as this is the bottom layer of my 4-layer board, the adjacent layer is VCC, not GND. Is there something I can do to address this? Could I use a GND polygon 'island' on the VCC layer? Is this necessary?

 

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I don't know what kind of DAC that is, but generally the first thing I do with DAC outputs is stuff them into an op-amp buffer.  ESPECIALLY if they're going through a connector off the board.  Perhaps your DAC has built-in amplified outputs.  S.

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Very valid point! I'm using a DAC108S085, which has an output buffer stage built into the IC. If I have drive issues with this initial prototype I'll certainly look to incorporate a more robust external opamp buffer. For the time being though i'd like to put the inherent buffer through its paces, so to speak.

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Just an aside: I'm not sure you have the correct pin numbering on your 2-row connector.

 

It should go:

 1  2

 3  4

 5  6

etc.

 

Your analogue signals (& associated GND) will then have consequtive pin numbers.

 

 

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The connector itself isn't actually a 2-row connector; it's a 66-pin connector, which is made up of a couple of rows of 2.54mm pitch pins. The pin numbering is a little confusing from the screenshots I've provided above, but there is certainly some logic behind their orientation.