Optimize to RJMP 0x0000 ?

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Why does WIN AVR (avr studio 4) optimize my function with this at the end?

000000C4:   CFFF        RJMP      PC-0x0000      Relative jump

This looks as an infinite line for me?

It took a while before I finally found why me code was not working. Until I disabled the -Os and chose -O0.
Trying to find why, I saw in simulation this rule which the simulator hangs himself to. It is the last } of the putchar function.

#include "main.h"
//8 Mhz 5v
//Software Uart @ 9600 baud PB1
#define IDLE		0
#define STARTBIT	1
#define TRANSMIT	2
#define STOPBIT 	3
#define FINISHED	4

byte sTX_state 		= IDLE;
byte sTX_bitcounter = 0;
byte sTX_data 		= 0;

void init_io(void){
	//IO
	DDRB	=	((1<<PORTB0)|(1<<PORTB1));
	PORTB 	=	3;
	//Timer 0
	TCCR0A = (1<<WGM01);
	TCCR0B = (1<<CS01);	
 	TCNT0  = 0;
	//Baud 9600
 	OCR0A  = 104;
 	OCR0B  = 0;
 	TIMSK0 = (1<<OCIE0A);	
	TIFR0  = 0;			
	sei();
	return;
}

ISR(TIMER0_COMPA_vect){
	switch(sTX_state){
		//##########
		case IDLE:											
			TIMSK0 &= ~(1<<OCIE0A);
	break; 													
		//##########
		case STARTBIT:										
			PORTB  &= ~2;									
			sTX_state 	= TRANSMIT;
	break;	//Wait 1 bit length
		//##########
		case TRANSMIT:
			//Fase 1: Shift 1 bit
				if( (sTX_data & 0x01) == 0x01 ){							
					PORTB |= 2;							
				}else{														
					PORTB  &= ~2;							
				}
				sTX_data >>= 1;			
			//Fase 2: Incement Bit Counter and Compare
				sTX_bitcounter += 1;
				if(sTX_bitcounter < 8){						
					sTX_state = TRANSMIT;					
				}else{										
					sTX_state = STOPBIT;	
				}								
	break; 								
		//##########
		case STOPBIT:
			PORTB |= 2;	//High level
			//Cleanup
			sTX_bitcounter  = 0;
			sTX_state	= IDLE;
	break;
		//##########
		default:	//Exception
			sTX_state 	=	STOPBIT;
	break;
	}
	return;
}

int main(void){
	init_io();
	byte i=0;
	while(1){		
		PORTB ^= 1;
		i++;
		sTX_putchar(i);
	}
	return 0;
}

void sTX_putchar(byte data){
	while(sTX_state != IDLE);
		sTX_data   = data;
		sTX_state  = STARTBIT;
		TIMSK0 	|= (1<<OCIE0A);
} //000000C2:   CFFF        RJMP      PC-0x0000      Relative jump



Little sidenote, this is Software Uart TX running om timer 0 in the ATmega328p... Working properly without optimizes.
@8 mhz / 5v

The full Avr studio 4 project is included as attachment.

Note, I am developing this to implement later on in an Tiny, so optimize is pretty much essential. Which does not have an UART module like the mega328 does.

Attachment(s): 

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I guess it deduces from your code sTxState is always set to STARTBIT, which does not equal IDLE, the loop never terminates, so no point in doing anything. It assumes stxstate is not modified from somewhere else. With that assumption in mind, putchar is in fact dead code.

Declare it as 'volatile byte stxstate' and I guess it's going to work ;)

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For the benefit of others. Here's the .lss. I agree that the tight loop at 184 (aka C2) does seem orphaned and mis-placed?

00000090 :
byte sTX_bitcounter = 0;
byte sTX_data 		= 0;

void init_io(void){
	//IO
	DDRB	=	((1<<PORTB0)|(1<<PORTB1));
  90:	83 e0       	ldi	r24, 0x03	; 3
  92:	84 b9       	out	0x04, r24	; 4
	PORTB 	=	3;
  94:	85 b9       	out	0x05, r24	; 5

	//Timer 0
	TCCR0A = (1<<WGM01);//COM0A1 COM0A0 COM0B1 COM0B0 -- WGM01 WGM00
  96:	92 e0       	ldi	r25, 0x02	; 2
  98:	94 bd       	out	0x24, r25	; 36
	TCCR0B = (1<<CS01);	//FOC0A FOC0B -- WGM02 CS02 CS01 CS00
  9a:	95 bd       	out	0x25, r25	; 37
 	TCNT0  = 0;
  9c:	16 bc       	out	0x26, r1	; 38
	/*				Xtal		 8000000			
	N Ocnx	=	------------ = 	---------  =	104,1666667
				Baud * Presc	9600 * 8 					*/	
 	OCR0A  = 104;
  9e:	88 e6       	ldi	r24, 0x68	; 104
  a0:	87 bd       	out	0x27, r24	; 39
 	OCR0B  = 0;
  a2:	18 bc       	out	0x28, r1	; 40
 	TIMSK0 = (1<<OCIE0A);	//----- OCIE0B OCIE0A TOIE0
  a4:	90 93 6e 00 	sts	0x006E, r25
	TIFR0  = 0;				//----- OCF0B OCF0A TOV0
  a8:	15 ba       	out	0x15, r1	; 21
	sei();
  aa:	78 94       	sei
	return;
}
  ac:	08 95       	ret

000000ae <__vector_14>:

ISR(TIMER0_COMPA_vect){
  ae:	1f 92       	push	r1
  b0:	0f 92       	push	r0
  b2:	0f b6       	in	r0, 0x3f	; 63
  b4:	0f 92       	push	r0
  b6:	11 24       	eor	r1, r1
  b8:	8f 93       	push	r24
  ba:	9f 93       	push	r25
  bc:	ef 93       	push	r30
  be:	ff 93       	push	r31
	switch(sTX_state){
  c0:	80 91 00 01 	lds	r24, 0x0100
  c4:	81 30       	cpi	r24, 0x01	; 1
  c6:	69 f0       	breq	.+26     	; 0xe2 <__vector_14+0x34>
  c8:	81 30       	cpi	r24, 0x01	; 1
  ca:	28 f0       	brcs	.+10     	; 0xd6 <__vector_14+0x28>
  cc:	82 30       	cpi	r24, 0x02	; 2
  ce:	91 f0       	breq	.+36     	; 0xf4 <__vector_14+0x46>
  d0:	83 30       	cpi	r24, 0x03	; 3
  d2:	e1 f5       	brne	.+120    	; 0x14c <__vector_14+0x9e>
  d4:	31 c0       	rjmp	.+98     	; 0x138 <__vector_14+0x8a>
		//##########
		case IDLE:											//IDLE mode, wait for startbit
			TIMSK0 &= ~(1<<OCIE0A);
  d6:	ee e6       	ldi	r30, 0x6E	; 110
  d8:	f0 e0       	ldi	r31, 0x00	; 0
  da:	80 81       	ld	r24, Z
  dc:	8d 7f       	andi	r24, 0xFD	; 253
  de:	80 83       	st	Z, r24
  e0:	38 c0       	rjmp	.+112    	; 0x152 <__vector_14+0xa4>
	break; 													//Wait 1 bit length
		//##########
		case STARTBIT:										//STARTBIT MODE (1 bit)
			PORTB  &= ~2;									//Low Level
  e2:	e5 e2       	ldi	r30, 0x25	; 37
  e4:	f0 e0       	ldi	r31, 0x00	; 0
  e6:	80 81       	ld	r24, Z
  e8:	8d 7f       	andi	r24, 0xFD	; 253
  ea:	80 83       	st	Z, r24
			sTX_state 	= TRANSMIT;
  ec:	82 e0       	ldi	r24, 0x02	; 2
  ee:	80 93 00 01 	sts	0x0100, r24
  f2:	2f c0       	rjmp	.+94     	; 0x152 <__vector_14+0xa4>
	break;	//Wait 1 bit length
		//##########
		case TRANSMIT:
			//Fase 1: Shift 1 bit
				if( (sTX_data & 0x01) == 0x01 ){			//1 in lsb sTX_data					
  f4:	90 91 02 01 	lds	r25, 0x0102
  f8:	90 ff       	sbrs	r25, 0
  fa:	06 c0       	rjmp	.+12     	; 0x108 <__vector_14+0x5a>
					PORTB |= 2;								//High level
  fc:	e5 e2       	ldi	r30, 0x25	; 37
  fe:	f0 e0       	ldi	r31, 0x00	; 0
 100:	80 81       	ld	r24, Z
 102:	82 60       	ori	r24, 0x02	; 2
 104:	80 83       	st	Z, r24
 106:	05 c0       	rjmp	.+10     	; 0x112 <__vector_14+0x64>
				}else{										//0 in lsb sTX_data					
					PORTB  &= ~2;							//Low Level
 108:	e5 e2       	ldi	r30, 0x25	; 37
 10a:	f0 e0       	ldi	r31, 0x00	; 0
 10c:	80 81       	ld	r24, Z
 10e:	8d 7f       	andi	r24, 0xFD	; 253
 110:	80 83       	st	Z, r24
				}
				sTX_data >>= 1;								//Shift away sent bit
 112:	89 2f       	mov	r24, r25
 114:	86 95       	lsr	r24
 116:	80 93 02 01 	sts	0x0102, r24
			//Fase 2: Incement Bit Counter and Compare
				sTX_bitcounter += 1;
 11a:	80 91 01 01 	lds	r24, 0x0101
 11e:	8f 5f       	subi	r24, 0xFF	; 255
 120:	80 93 01 01 	sts	0x0101, r24
				if(sTX_bitcounter < 8){						//Not all bits send
 124:	88 30       	cpi	r24, 0x08	; 8
 126:	20 f4       	brcc	.+8      	; 0x130 <__vector_14+0x82>
					sTX_state = TRANSMIT;					//Repeat
 128:	82 e0       	ldi	r24, 0x02	; 2
 12a:	80 93 00 01 	sts	0x0100, r24
 12e:	11 c0       	rjmp	.+34     	; 0x152 <__vector_14+0xa4>
				}else{										//All bits send
					sTX_state = STOPBIT;					//Stopbit
 130:	83 e0       	ldi	r24, 0x03	; 3
 132:	80 93 00 01 	sts	0x0100, r24
 136:	0d c0       	rjmp	.+26     	; 0x152 <__vector_14+0xa4>
				}								
	break; 													//Wait 1 bit length
		//##########
		case STOPBIT:
			PORTB |= 2;	//High level
 138:	e5 e2       	ldi	r30, 0x25	; 37
 13a:	f0 e0       	ldi	r31, 0x00	; 0
 13c:	80 81       	ld	r24, Z
 13e:	82 60       	ori	r24, 0x02	; 2
 140:	80 83       	st	Z, r24
			//Cleanup
			sTX_bitcounter  = 0;
 142:	10 92 01 01 	sts	0x0101, r1
			sTX_state	= IDLE;
 146:	10 92 00 01 	sts	0x0100, r1
 14a:	03 c0       	rjmp	.+6      	; 0x152 <__vector_14+0xa4>
	break;
		//##########
		default:	//Exception
			sTX_state 	=	STOPBIT;
 14c:	83 e0       	ldi	r24, 0x03	; 3
 14e:	80 93 00 01 	sts	0x0100, r24
	break;
	}
	return;
}
 152:	ff 91       	pop	r31
 154:	ef 91       	pop	r30
 156:	9f 91       	pop	r25
 158:	8f 91       	pop	r24
 15a:	0f 90       	pop	r0
 15c:	0f be       	out	0x3f, r0	; 63
 15e:	0f 90       	pop	r0
 160:	1f 90       	pop	r1
 162:	18 95       	reti

00000164 :

void sTX_putchar(byte data){
 164:	98 2f       	mov	r25, r24
	while(sTX_state != IDLE);
 166:	80 91 00 01 	lds	r24, 0x0100
 16a:	88 23       	and	r24, r24
 16c:	59 f4       	brne	.+22     	; 0x184 
		sTX_data   = data;
 16e:	90 93 02 01 	sts	0x0102, r25
		sTX_state  = STARTBIT;
 172:	81 e0       	ldi	r24, 0x01	; 1
 174:	80 93 00 01 	sts	0x0100, r24
		TIMSK0 	|= (1<<OCIE0A);
 178:	ee e6       	ldi	r30, 0x6E	; 110
 17a:	f0 e0       	ldi	r31, 0x00	; 0
 17c:	80 81       	ld	r24, Z
 17e:	82 60       	ori	r24, 0x02	; 2
 180:	80 83       	st	Z, r24
	return;
} //FAAL! 000000C2:   CFFF        RJMP      PC-0x0000      Relative jump
 182:	08 95       	ret
 184:	ff cf       	rjmp	.-2      	; 0x184 

00000186 
: int main(void){ 186: 0f 93 push r16 188: 1f 93 push r17 18a: cf 93 push r28 18c: df 93 push r29 init_io(); 18e: 0e 94 48 00 call 0x90 ; 0x90 192: 10 e0 ldi r17, 0x00 ; 0 byte i=0; while(1){ PORTB ^= 1; 194: c5 e2 ldi r28, 0x25 ; 37 196: d0 e0 ldi r29, 0x00 ; 0 198: 01 e0 ldi r16, 0x01 ; 1 19a: 88 81 ld r24, Y 19c: 80 27 eor r24, r16 19e: 88 83 st Y, r24 i++; 1a0: 1f 5f subi r17, 0xFF ; 255 sTX_putchar(i); 1a2: 81 2f mov r24, r17 1a4: 0e 94 b2 00 call 0x164 ; 0x164 1a8: f8 cf rjmp .-16 ; 0x19a 000001aa <_exit>: 1aa: f8 94 cli 000001ac <__stop_program>: 1ac: ff cf rjmp .-2 ; 0x1ac <__stop_program>

And this is the .s file:

	.text
.Ltext0:
.global	init_io
	.type	init_io, @function
init_io:
.LFB2:
.LM1:
/* prologue: function */
/* frame size = 0 */
.LM2:
	ldi r24,lo8(3)
	out 36-32,r24
.LM3:
	out 37-32,r24
.LM4:
	ldi r25,lo8(2)
	out 68-32,r25
.LM5:
	out 69-32,r25
.LM6:
	out 70-32,__zero_reg__
.LM7:
	ldi r24,lo8(104)
	out 71-32,r24
.LM8:
	out 72-32,__zero_reg__
.LM9:
	sts 110,r25
.LM10:
	out 53-32,__zero_reg__
.LM11:
/* #APP */
 ;  29 "../main.c" 1
	sei
 ;  0 "" 2
/* epilogue start */
.LM12:
/* #NOAPP */
	ret
.LFE2:
	.size	init_io, .-init_io
.global	__vector_14
	.type	__vector_14, @function
__vector_14:
.LFB3:
.LM13:
	push __zero_reg__
	push r0
	in r0,__SREG__
	push r0
	clr __zero_reg__
	push r24
	push r25
	push r30
	push r31
/* prologue: Signal */
/* frame size = 0 */
.LM14:
	lds r24,sTX_state
	cpi r24,lo8(1)
	breq .L6
	cpi r24,lo8(1)
	brlo .L5
	cpi r24,lo8(2)
	breq .L7
	cpi r24,lo8(3)
	brne .L14
	rjmp .L15
.L5:
.LM15:
	ldi r30,lo8(110)
	ldi r31,hi8(110)
	ld r24,Z
	andi r24,lo8(-3)
	st Z,r24
	rjmp .L13
.L6:
.LM16:
	ldi r30,lo8(37)
	ldi r31,hi8(37)
	ld r24,Z
	andi r24,lo8(-3)
	st Z,r24
.LM17:
	ldi r24,lo8(2)
	sts sTX_state,r24
	rjmp .L13
.L7:
.LM18:
	lds r25,sTX_data
	sbrs r25,0
	rjmp .L10
.LM19:
	ldi r30,lo8(37)
	ldi r31,hi8(37)
	ld r24,Z
	ori r24,lo8(2)
	st Z,r24
	rjmp .L11
.L10:
.LM20:
	ldi r30,lo8(37)
	ldi r31,hi8(37)
	ld r24,Z
	andi r24,lo8(-3)
	st Z,r24
.L11:
.LM21:
	mov r24,r25
	lsr r24
	sts sTX_data,r24
.LM22:
	lds r24,sTX_bitcounter
	subi r24,lo8(-(1))
	sts sTX_bitcounter,r24
.LM23:
	cpi r24,lo8(8)
	brsh .L12
.LM24:
	ldi r24,lo8(2)
	sts sTX_state,r24
	rjmp .L13
.L12:
.LM25:
	ldi r24,lo8(3)
	sts sTX_state,r24
	rjmp .L13
.L15:
.LM26:
	ldi r30,lo8(37)
	ldi r31,hi8(37)
	ld r24,Z
	ori r24,lo8(2)
	st Z,r24
.LM27:
	sts sTX_bitcounter,__zero_reg__
.LM28:
	sts sTX_state,__zero_reg__
	rjmp .L13
.L14:
.LM29:
	ldi r24,lo8(3)
	sts sTX_state,r24
.L13:
/* epilogue start */
.LM30:
	pop r31
	pop r30
	pop r25
	pop r24
	pop r0
	out __SREG__,r0
	pop r0
	pop __zero_reg__
	reti
.LFE3:
	.size	__vector_14, .-__vector_14
.global	sTX_putchar
	.type	sTX_putchar, @function
sTX_putchar:
.LFB4:
.LM31:
.LVL0:
/* prologue: function */
/* frame size = 0 */
	mov r25,r24
.LM32:
	lds r24,sTX_state
.LVL1:
	tst r24
	brne .L17
.LM33:
	sts sTX_data,r25
.LM34:
	ldi r24,lo8(1)
	sts sTX_state,r24
.LM35:
	ldi r30,lo8(110)
	ldi r31,hi8(110)
	ld r24,Z
	ori r24,lo8(2)
	st Z,r24
/* epilogue start */
.LM36:
	ret
.L17:
.L19:
	rjmp .L19
.LFE4:
	.size	sTX_putchar, .-sTX_putchar
.global	main
	.type	main, @function
main:
.LFB5:
.LM37:
	push r16
	push r17
	push r28
	push r29
/* prologue: function */
/* frame size = 0 */
.LM38:
	call init_io
	ldi r17,lo8(0)
.LVL2:
.LM39:
	ldi r28,lo8(37)
	ldi r29,hi8(37)
	ldi r16,lo8(1)
.L21:
	ld r24,Y
	eor r24,r16
	st Y,r24
.LM40:
	subi r17,lo8(-(1))
.LM41:
	mov r24,r17
	call sTX_putchar
	rjmp .L21
.LFE5:
	.size	main, .-main
.global	sTX_state
.global	sTX_state
	.section .bss
	.type	sTX_state, @object
	.size	sTX_state, 1
sTX_state:
	.skip 1,0
.global	sTX_bitcounter
.global	sTX_bitcounter
	.type	sTX_bitcounter, @object
	.size	sTX_bitcounter, 1
sTX_bitcounter:
	.skip 1,0
.global	sTX_data
.global	sTX_data
	.type	sTX_data, @object
	.size	sTX_data, 1
sTX_data:
	.skip 1,0

The "odd" code is at .L19:

Nothing else in the code makes reference to .L19 so it's unreachable.

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clawson wrote:
Nothing else in the code makes reference to .L19 so it's unreachable.
I disagree. Search for .L17. ;-)

It is indeed an endless loop resulting from a missing volatile. sTX_state is tested only once, and the endless loop is executed if !=0.

Stefan Ernst

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It works when I add the volatile keyword to all the sTX global variables.

After I Googled what volatile meant I came back to the article I threw away as "not important" yesterday.
(as in, "wont happen with me")
From what I can get the article http://bit.ly/eQQXQs
The compiler does not see changes in an ISR as real changes and thereby concludes that the variable is "dead". Or in this case, a One-Time change. (That might explain why it only worked once per power-up)
And with the volatile keyword you put tell the compiler that it can be changed everywhere throughout the file.

But I'm a bit worried about this sentence in the article

Quote:
Then all of your problems (well, some of them anyway) will disappear.


*Why did I end up reading an article about volatiles yesterday, thinking "oh, I don't need that yet" and stopped reading? telepathic powers?
*

Edit: actually, reading FAQ 1 in the sig, I'm confused why they didn't told me those rules at lesson 1 of the course MCU's :( !

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Quote:

I'm confused why they didn't told me those rules at lesson 1 of the course MCU's

You are right to be worried. If a course on MCU programming in C does not even mention 'volatile' then I would seriously question the competence of the lecturer.

Quote:

The compiler does not see changes in an ISR as real changes

While that formulation is not technically spot-on, you've gotten the gist of it. I'd rather formulate it as something like this:

When the compiler deals with main() it can not see that there is a (quasi-)parallel, independent, path of execution (the ISR) that might change the variable. Not seeing this it makes optimizations that breaks the intended functionality of your code. The 'volatile' keyword works like a hint to the compiler that there are such circumstances, and that it should refrain from such optimizations.

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Quote:

I'm confused why they didn't told me those rules at lesson 1 of the course MCU's

You are right to be worried. If a course on MCU programming in C does not even mention 'volatile' then I would seriously question the competence of the lecturer.

Quote:

The compiler does not see changes in an ISR as real changes

While that formulation is not technically spot-on, you've gotten the gist of it. I'd rather formulate it as something like this:

When the compiler deals with main() it can not see that there is a (quasi-)parallel, independent, path of execution (the ISR) that might change the variable. Not seeing this it makes optimizations that breaks the intended functionality of your code. The 'volatile' keyword works like a hint to the compiler that there are such circumstances, and that it should refrain from such optimizations.

I'm too old to be able to read that fine print you put into your last post, and I'm too lazy to enlarge the browser text. Hope it wasn't anything important. :evil:

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Quote:

After I Googled what volatile meant I came back to the article I threw away as "not important" yesterday.
(as in, "wont happen with me")
From what I can get the article http://bit.ly/eQQXQs

If you searched a bit closer to home you might also have found:

Optimization and the importance of volatile in GCC

(well worth having a browse through the tutorial forum and see if anything else looks relevant)

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Thats a lot to read, bookmarked it :)

Thanks anyway

You can actually press ctrl and use the scroll wheel.
And no, there was nothing important in the small sentence. :p

*Damn, i just fusekilled my last ATtiny13 :(*

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jeroen3 wrote:
The compiler does not see changes in an ISR as real changes [...]

Suppose your math teacher gave you the following exercise:

Teacher: Let a=1 and b=2. What's the sum of a and b?
You: That's simple: a+b=3, of course.
Teacher: You solution is wrong. The answer is 9 because I changed b to 8 meanwhile, :-)

It's similar here. You changed things without the compiler notifying about it.

avrfreaks does not support Opera. Profile inactive.

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Quote:
You changed things without the compiler notifying about it.
No, it is not about the compiler notifying anyone. It is about the programmer not notifying the compiler that the value might change.

Regards,
Steve A.

The Board helps those that help themselves.

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When I make variable, I think its variable, not semi-constant.
But the thoughts behind the compiler are different.

embedded.com said that the compiler would be the problem here. But thats not true.
If it was, I had to go looking for a new one :p

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variable, in the sense that its value can change. Volatile tells the compiler it can change from another execution context.

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Koshchi wrote:
Quote:
You changed things without the compiler notifying about it.
No, it is not about the compiler notifying anyone. It is about the programmer not notifying the compiler that the value might change.

Sorry, my english isn't very good.

avrfreaks does not support Opera. Profile inactive.