Is this an optimal way to use a timer?

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I folks,

I'm trying to understand good ways to use timers. Tell me if this is a reasonable way to do things.

Let's say I'm running at 8MHz and I want to use a 16-bit timer to measure 1 second. If I use a prescaler of 256 that means 1 second will have passed then the timer reaches 31250 (because 8000000/256=31250).

So, if I write to the TNCTx a value of 34286 (65536-31250) and reset this at every interrupt the overflow flag should trip every 1 second. Right?

My first question is: The overflow flag isn't thrown until the timer rolls over to zero. I've taken care of that but use 65536 (instead of 0xFFFF) right? In other words, am I doing the math right or have I added 1 cycle too many?

My second question: Is this better/worse/same as just using CTC mode and setting my value?

Thanks for the help.

I'm asking this in the abstract... but in case it helps. I'll be testing this out on an ATmega168 using Timer1.

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In other words, am I doing the math right or have I added 1 cycle too many?

Well, let's say you wanted to trip after one timer count. What would you set TCNT1 to? Then extrapolate from there.

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Is this better/worse/same as just using CTC mode and setting my value?

CTC mode is better for heartbeat timing. There will be no jitter on the trips, as log as you get to the servicing before another complete cycle. The ISR needs to do no timer fussing so it is shorter; often much shorter. With the TCNT/overflow approach, you are racing the latency of one time count vs. one timer complete cycle time.

Lee

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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While reloading the timer to MAXCOUNT-TICKSYOUNEED at every overflow is okay, the CTC is better because it just counts from 0 to TICKSYOUNEED and resets to 0, and does it automatically.

Look at the datasheet about the off-by-one-and-which-direction-or-not thing.

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For me, I'm a believer in letting the onboard hardware do as much work as possible. I just find it more elegant that way. So I'd use the CTC mode in your case. I don't see any benefit to explicitly reloading the timer in the ISR. What do you think it gains you?

Mike

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What do you think it gains you?

Jitter? :lol:

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I was unsure of the benefits/drawbacks of this situation. In my mind I thought that preloading the timer to trip at overflow would prevent any chance of missing a compare match.

On the other hand, because I'm measuring such a large number of cycles there's very little chance I'm going to miss a compare anyway.

Thanks for the advice and for setting me straight.

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The whole idea of having the compare hardware is that the hardware does the hard work so you don't miss a compare. And with the CTC function it does the reset for you.