Mysteriously broken Atmega644p

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Hi,

I have a couple of dozen Atmega644p based measurement system boards that have been in testing use for two months. After the testing period I noticed that two of them were dead. Everything was electrically fine on the "dead" boards, but the Atmega644p chip had mysteriously stopped executing the program. I connected them to my STK500 and found out that they respond fine to chip erase and fuse settings, but when I try to program the flash memory, avrdude stops with an error about invalid device signature. I tried to use the "-F" force flag with avrdude and got this response:

avrdude: stk500v2_command(): unknown status 0x80
avrdude: stk500v2_paged_write: write command failed
avrdude: failed to write flash memory, rc=-1

Something has happened to these two atmegas during the test run period, because they were 100% functional two months ago.

I wonder, could this be hardware damage for example due to static electricity? Can the AVR be damaged physically so that only the flash memory fails?

-slintone

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I connected them to my STK500 and found out that they respond fine to chip erase and fuse settings,

Given that you go on to say that they don't respond correctly to Read Signature, they don't in fact "respond fine" to the operations you mentioned. The ISP program is reading >>a<< "response"--the state of the MISO line. It could be complete garbage.

Quote:

I wonder, could this be hardware damage for example due to static electricity?

Certainly.

Quote:

Can the AVR be damaged physically so that only the flash memory fails?

As suggested above, your situation very probably has no relationship to flash memory.

Work on Read Signature first. If you can do that, other ISP operations are probably going to work OK. If you cannot, then other operations will probably fail.

You start your diagnosis as with any other ISP problem:

-- Does the AVR have power? Vcc and AVcc? Proper levels? All Gnd hooked up and properly decoupled?

-- Does the AVR have a clock source?

-- Does /RESET wiggle when you do a Read Signature?

-- When /RESET is pulled low, what do you see on SCK?

-- When /RESET is pulled low, what do you see on MOSI?

-- When /RESET is pulled low, what do you see on MISO?

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Use STK500 & HV programming and see whether you can talk to it!

Charles Darwin, Lord Kelvin & Murphy are always lurking about!
Lee -.-
Riddle me this...How did the serpent move around before the fall?

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OK, thanks! Sorry about the hassle, but it seems that the cause of the problem is completely different than I initially suspected.

I started to investigate further with a scope and noticed that the /RESET line is low all the time! Surprisingly, this was caused by a SMD ceramic capacitor between /RESET and GND which has failed to a conducting state.

With the previous prototype generation I saw that the atmega was reseting by itself when it was positioned near large inductive devices like motors and solenoids. After some scoping I saw that it was caused by induced voltage spikes in the /RESET line. I "fixed" it by adding a 100 nF ceramic capacitor between GND and /RESET which initially worked very well. No spurious resets any more with the new generation. But, it seems that my hand soldering is not done properly as the SMD capacitors probably suffered from catastrophical cracking some time after the assembly.