multiple I2C master problem

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ian_ISS
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Posted by ian_ISS: Sat. Jun 22, 2019 - 03:05 PM
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Hello,

 

(First, I'm quit a beginer in microcontroller programmation)

 

I am using 4 ATMEGA2561 all communicating on the same I2C bus. So they all have the same I2C adress. The problem is, I am obliged to have 2 master (among the 4 atmega) and it cause lots of problem with one microcontroller wich is reading in the same time a sensor in I2C (also on the same bus, there is only 1 I2C port on this micro). 

 

So my question is : Is i possible to define different I2C adress for each microcontroller so that, I can really separate communications and know to who I'm sending data to ?

 

Thanks a lot for your answer, you would save me !

 

Ian

 

Tags:

AVR Microcontrollers, megaAVR and tinyAVR, #AVR #atmelstudio #I2C #adress #atmega2561
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MrKendo
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Posted by MrKendo: Sat. Jun 22, 2019 - 04:28 PM
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ian_ISS wrote:
So my question is : Is i possible to define different I2C adress for each microcontroller so that, I can really separate communications and know to who I'm sending data to ?

Yes.

TWAR – TWI (Slave) Address Register

 

As to having multiple masters, I've never tried myself so can't help with that, other than it looks like it is feasible, take a look at the datsheet section

"Multi-master Bus Systems, Arbitration, and Synchronization"

 

I would start with a single master, multiple slaves, get that working first before moving on to multiple masters.

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avrcandies
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Posted by avrcandies: Sat. Jun 22, 2019 - 04:34 PM
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I'm quit a beginer in microcontroller programmation

 

Nobody starts learning microcontrollers using four at once.   It will be total chaos!!   All I2C sensors must have some sort of addressing scheme---it is an inherent part of the standard.

 

Start simple and get one sensor talking to one AVR first...do you even have that much working? Then get one micro & 2 sensors with different addresses working. Do you have that much working?

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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ka7ehk
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Posted by ka7ehk: Sat. Jun 22, 2019 - 06:41 PM
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You really need some kind of arbitration between the masters. Think about the consequences if one master decided to access the bus the same the other is using it. And, further, think of what the slave has to do if the second master tries to access it while it is "connected" to the first master. 

 

At the very least, in such as system, make the two masters so that only one can be master at a time. Have the current master send a token to the other (which, at this point, functions as a slave), saying "you can be master now and access the bus, while I am quiet", then the first master turns into a slave. Later, then, the new master turns around and gives the previous master that token and the one with the token becomes THE master and the one without becomes a slave. THAT would solve your problem.

 

Each device in the system would have a unique address, so there are no addressing problems.

 

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

Last Edited: Sat. Jun 22, 2019 - 06:42 PM
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ian_ISS
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Posted by ian_ISS: Sat. Jun 22, 2019 - 07:41 PM
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Thanks a lot for your answers !

 

I've already done master-slave and master multiple-slave. But the slaves were different in that test so there wasn't any adress problem.

 

So, by givin up the multiple master system too complex for me, I have now 1 master et 3 slaves (but with the same adress), I just need now to redefine the I2C adress of my 3 other slave microcontroller with TWAR register ?

 

like that  :? TWAR=adress (in hexadecimal)

In that case what can I give in adress … whatever I want ? 0x02 , 0x04 , 0x08 ?

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avr-mike
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Posted by avr-mike: Sat. Jun 22, 2019 - 08:23 PM
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ka7ehk wrote:

You really need some kind of arbitration between the masters.

 

I2C has arbitration "built-in" to the protocol. No need

to do anything yourself except make sure another

master did not "win" the arbitration.  This is done by

checking the status code (the TWS bits in TWSR).

 

--Mike

 

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MrKendo
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Posted by MrKendo: Sat. Jun 22, 2019 - 08:30 PM
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Multi-master is built into the protocol, however

after a bit of searching on the avrfreaks site it seems that multi-master support in the AVR TWI hardware may have a race condition that you would need to work around in software.

So avoiding multi-master if possible is a good plan, it looks like it could be a bit of a pain.

 

For the slave address, it's a 7bit value.

Pick whatever you want, apart from

i) I wouldn't use 0.

ii) and I notice in the datasheet it says to avoid 1111xxx as being reserved (so that's 120 - 127) so it would be sensible to avoid those values.

 

I'm a bit confused now though. If you already have your micrcontrollers working as slave, you must already be running some code on them, so what does that code do in terms of setting the address?

You definitely should read the ATMEGA2561 datasheet. Then it will be clear.

Or If you mean your  slave devices are prebuilt and you can't program them, then you are stuck using whatever address the designer of the device chose to use.

Often such devices will have a jumper or two which can be used to configure the address to at least a few dfifferent values.

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avr-mike
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Posted by avr-mike: Sat. Jun 22, 2019 - 09:34 PM
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MrKendo wrote:

it seems that multi-master support in the AVR TWI hardware may have a race condition that you would need to work around in software.

 

Hmmm, this did not make the Errata in the datasheet.

There is no TWI errata in the 2561 datasheet at all but

the 328P has this for TWI slave mode:

 

TWI Errata 328P

 

--Mike

 

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MrKendo
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Posted by MrKendo: Sat. Jun 22, 2019 - 09:49 PM
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avr-mike wrote:

MrKendo wrote:

 

it seems that multi-master support in the AVR TWI hardware may have a race condition that you would need to work around in software.

 

 

 

Hmmm, this did not make the Errata in the datasheet.

There is no TWI errata in the 2561 datasheet at all but

the 328P has this for TWI slave mode:

A lot of the posts are pretty old eg. 2006, 2008

Maybe it is not an issue anymore (how recent is mega2561?)

Either way, it adds some complexity, so you will have an easier time if you can avoid multi-master.

 

 

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ka7ehk
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Posted by ka7ehk: Sat. Jun 22, 2019 - 10:12 PM
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Whether or not you "needed it", the token passing scheme I tried to describe makes it very explicit and, if implemented with some intelligence, devoid of race conditions. 

 

Jim

 

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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meslomp
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Posted by meslomp: Mon. Jun 24, 2019 - 05:26 AM
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As already stated the I2C specification has multi master bus arbitration build in. You will need to check out the documentation on that. If you search for I2C specification there will be a complete specification.

As you have already done a master to multi slave exercise you should have learned already that there never ever should be 2 devices with the same address on the bus or you will have to face the consequences, I wonder why you have not made sure that that condition is met.

 

If I recall correctly in the I2C specification there is no system were the masters can talk to each other, but I never had to need to have a multi master system, check the specification for that to see if in the mean time they have devised a global way to do that. else you have to devise your own way to make the masters talk to each other.

 

 

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avr-mike
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Posted by avr-mike: Mon. Jun 24, 2019 - 07:33 AM
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Multiple masters are addressable by each other.  You place

a master's slave address in TWAR and when it is configured

as a slave or loses arbitration, it recognizes its own address:

 

TWAR Register

From the Multi-Master Systems and Arbitration section:

TWI Multi Master

The above quotes are from the ATmega328P datasheet.

 

--Mike

 

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ian_ISS
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Posted by ian_ISS: Mon. Jun 24, 2019 - 08:58 PM
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Thanks you very much everybody for your clear and helpfull answers !!
I was thinking that the I2C adress of an microcontroller was fix and unique but we can easily redefine it in TWAR.
So that's what I've done and it works perfectly with one master and 4 slave on the same bus.

Thanks a lot !
Ian

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