megaAVR 0-series

Go To Last Post
285 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

http://packs.download.atmel.com/#collapse-Atmel-ATmega-DFP-pdsc

1.2.203 (2017-12-15)

Corrected register names for ATmega4809, ATmega4808, ATmega3209 and ATmega3208.

1.2.150

...

Added ATmega4809, ATmega4808, ATmega3209 and ATmega3208.

Two-level (plus NMI) interrupt controller

32KB and 48KB flash (likely unified memory)

28/32 pins for 8, 48 pins for 9

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

oooh...  Looks like there might even be a DIP-28 !

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Certainly gives the impression that the ATtiny's (xtiny's) are limiting out at 16KB and that 32KB, and larger?, will be classified as ATMega, though that conflicts with what Jan (je_ruud) wrote here.  It would be nice to see an actual roadmap!  Microchip|Atmel, are you listening?

 

Seems to also confirm comments in other threads, made by Microchip|Atmel personnel, that indicated there would be no Xplained Pro based on an ATtiny1616 as they are most likely going to produce an Xplained Pro 32xx or 42xx instead. 

 

EDIT: je_ruud

 

"I may make you feel but I can't make you think" - Jethro Tull - Thick As A Brick

"void transmigratus(void) {transmigratus();} // recursio infinitus" - larryvc

"It's much more practical to rely on the processing powers of the real debugger, i.e. the one between the keyboard and chair." - JW wek3

"When you arise in the morning think of what a privilege it is to be alive: to breathe, to think, to enjoy, to love." -  Marcus Aurelius

Last Edited: Sun. Dec 31, 2017 - 05:14 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

So, 3 levels of interrupt priority now - nice!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 1

Two years ago the plans were completely different (, and we also had other owners...). Earth spins, plans change and we just have to compensate and make the best out of it.

 

Currently it seems to me (Marketing people are rather unpredictable at times. Or predictably unpredictable...) that what differs the new tiny's from the new mega's is pin count. But you won't find tiny's with >32kb flash. (.. ... Yet? Marketing, you know.)

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

je_ruud wrote:
..

Currently it seems to me (Marketing people are rather unpredictable at times. Or predictably unpredictable...) that what differs the new tiny's from the new mega's is pin count. But you won't find tiny's with >32kb flash. (.. ... Yet? Marketing, you know.)

I'll go with your "predictably unpredictable" assessment.  Guess we will just have to wait and see what pans out.

"I may make you feel but I can't make you think" - Jethro Tull - Thick As A Brick

"void transmigratus(void) {transmigratus();} // recursio infinitus" - larryvc

"It's much more practical to rely on the processing powers of the real debugger, i.e. the one between the keyboard and chair." - JW wek3

"When you arise in the morning think of what a privilege it is to be alive: to breathe, to think, to enjoy, to love." -  Marcus Aurelius

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Or, maybe, what pins out?

 

Jim

 

Until Black Lives Matter, we do not have "All Lives Matter"!

 

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Microchip

AN2515 Low-Power Techniques

http://ww1.microchip.com/downloads/en/appnotes/00002515b.pdf

(page 17)

10. Revision History

B

01/2018

Added some new sections:

• tinyAVR 0-series

• megaAVR 0-series

• Execution of the Sleep Instruction and Shared Variables Between ISR and Main

via https://www.microchip.com/search/searchapp/searchhome.aspx?q=atmega3209&resperpage=50&id=2

 

bits of PRR moved to each peripheral (p.7)

additional BOD mode (p.15)

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Microchip Technology Inc

Microchip

AN2633

Precise, Ultra-Low-Power Timing using Periodic Enabling of the 32.768 kHz External Crystal Oscillator for Recalibration of the ULP Internal Oscillator

01/30/2018

http://www.microchip.com/wwwappnotes/appnotes.aspx?appnote=jp604346

Microchip Technology Inc

Microchip

AN2634

Bootloader for tinyAVR 0- and 1-series, and megaAVR 0-series

by Egil Rotevatn

02/05/2018

http://www.microchip.com/wwwappnotes/appnotes.aspx?appnote=en604508

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 1

Microchip Technology Inc

Microchip

ATmega4809 Xplained Pro Schematics

http://ww1.microchip.com/downloads/en/devicedoc/atmega4809_xplained_pro_schematics.pdf (5.6MB)

via

Microchip Technology Inc

Microchip

Schematics

http://www.microchip.com/doclisting/techdoc.aspx?type=schematics

Search by: pull-down menu, select Document Title

enter ATmega4809

Search

engineering sample

An Xplained Pro that can power the target MCU at 5V (is that a first?)

Level converters!  Thank you!

ATECC508A cryptographic authenticator (ATECC608A adds AES-128)

3 Xplained Pro headers

1 mikroBUSTM header

32KHz crystal (Kyocera ST3215SB32768C0HPWBB)

 


http://www.microchip.com/wwwproducts/en/atecc508a

http://www.microchip.com/wwwproducts/en/atecc608a

Mouser Electronics

AVX / Kyocera

Crystals SMD 32.768kHz Tuning Forks 7pF

https://www.mouser.com/ProductDetail/AVX-Kyocera/ST3215SB32768C0HPWBB?qs=%2fha2pyFaduh8oCrdFLUv8Ccy3mfYtgQAHuqnoJP9i3zMn1Xvp%2fvrd0H7ZVNGPxY0

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

From iom4808.h:

#define MAPPED_EEPROM_START     (EEPROM_START)
#define MAPPED_EEPROM_SIZE      (EEPROM_SIZE)
#define MAPPED_EEPROM_PAGE_SIZE (EEPROM_PAGE_SIZE)
#define MAPPED_EEPROM_END       (MAPPED_EEPROM_START + MAPPED_EEPROM_SIZE - 1)

#define FUSES_START     (0x1280)
#define FUSES_SIZE      (10)
#define FUSES_PAGE_SIZE (64)
#define FUSES_END       (FUSES_START + FUSES_SIZE - 1)

#define INTERNAL_SRAM_START     (0x2800)
#define INTERNAL_SRAM_SIZE      (6144)
#define INTERNAL_SRAM_PAGE_SIZE (0)
#define INTERNAL_SRAM_END       (INTERNAL_SRAM_START + INTERNAL_SRAM_SIZE - 1)

#define IO_START     (0x0000)
#define IO_SIZE      (4352)
#define IO_PAGE_SIZE (0)
#define IO_END       (IO_START + IO_SIZE - 1)

#define LOCKBITS_START     (0x128A)
#define LOCKBITS_SIZE      (1)
#define LOCKBITS_PAGE_SIZE (64)
#define LOCKBITS_END       (LOCKBITS_START + LOCKBITS_SIZE - 1)

#define MAPPED_PROGMEM_START     (0x4000)
#define MAPPED_PROGMEM_SIZE      (49152)
#define MAPPED_PROGMEM_PAGE_SIZE (128)
#define MAPPED_PROGMEM_END       (MAPPED_PROGMEM_START + MAPPED_PROGMEM_SIZE - 1

 

Hmm, memory mapped FLASH.

Greg Muth

Portland, OR, US

Xplained/Pro/Mini Boards mostly

 

Make Xmega Great Again!

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

So you can get an explained pro, lots of app notes but no datasheet?? surprise

 

...and I would be the first one to put my hand up for a board in case there is a giveaway..... devil if I can get a datasheet of course.

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I've looked at the schematic. 48pin LQFP 0.5mm pitch, 41 i/o (wow!), at least 3 uarts .... (I always need uarts...).

48K flash all mapped to data space is nice too. 6K ram is also a pleasant surprise.

 

I have a feeling that Microchip with these new tiny and mega family wants to keep the architecture in the 64K limit.

Personally, I would do that the same. It's natural (and simpler) to have the 8bitters in max 64K range.

And for anything else, there is always cortex-m.

Anyway, it's a very pleasant surprise to see the avr architecture still actively developed, even if it will be kept in the 64K range smiley

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

rammon wrote:
It's natural (and simpler) to have the 8bitters in max 64K range.

And for anything else, there is always cortex-m.

And in-between are 16bitters.

It's been said that 16 bits is a sweet spot (code density, classic C int)

XMEGA was advertised as 8/16b; XMEGA AVR have a 24b address space.

AVR16 anyone?

Merge the AVR and PIC24 camps?  (best of both)

 

PIC32 can compete against arm Cortex-M.

A concern is the sale of MIPS.

 

Imagination Technologies

Completion of sale of MIPS

25th October 2017

https://www.imgtec.com/news/press-release/completion-of-sale-of-mips/

http://www.microchip.com/forums/FindPost/1023282 by wdy

(post #12)

...

How else would the evolution be kept if everybody jumped on the hyped ARM bandwagon?
...

Eggs in two baskets.

 

Edits: link target, #12

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Thu. Feb 8, 2018 - 12:51 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

They are also defined in current avrdude.conf, for example:

 

#------------------------------------------------------------
# ATmega4809
#------------------------------------------------------------

part parent    ".avr8x_mega"
    id        = "m4809";
    desc      = "ATmega4809";
    signature = 0x1E 0x96 0x51;

    memory "flash"
        size      = 0xC000;
        offset    = 0x4000;
        page_size = 0x80;
        readsize  = 0x100;
    ;

    memory "eeprom"
        size      = 0x100;
        offset    = 0x1400;
        page_size = 0x40;
        readsize  = 0x100;
    ;
;

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

gchapman wrote:

rammon wrote:
It's natural (and simpler) to have the 8bitters in max 64K range.

And for anything else, there is always cortex-m.

And in-between are 16bitters.

It's been said that 16 bits is a sweet spot (code density, classic C int)

XMEGA was advertised as 8/16b; XMEGA AVR have a 24b address space.

AVR16 anyone?

Merge the AVR and PIC24 camps?  (best of both)

 

PIC32 can compete against arm Cortex-M.

A concern is the sale of MIPS.

 

Imagination Technologies

Completion of sale of MIPS

25th October 2017

https://www.imgtec.com/news/press-release/completion-of-sale-of-mips/

http://www.microchip.com/forums/FindPost/1023282 by wdy

(post #12)

...

How else would the evolution be kept if everybody jumped on the hyped ARM bandwagon?
...

Eggs in two baskets.

 

Edits: link target, #12

 

 

Modern 8bitters are a good deal 16bitters as well.

16bit is hard to justify without going beyond the 64K space. But then, the easier way is just 32bit.

In my view, a true in-between 16bitter would have 16bit registers and 32bit address range with register pairs as indexes. But these days it seems that just a plain 32bit cpu may be simpler.

 

Cortex-m was just an example. I'm sure one can come with a better 32bit cpu (for example, a CISC one).

Competition.

 

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

rammon wrote:
48pin LQFP 0.5mm pitch, 41 i/o (wow!), ...
The least pin count version is in SSOP for 23 I/O (mega4808)

Microchip

megaAVR® Microcontrollers

ATmega4809 Family

http://ww1.microchip.com/downloads/en/devicedoc/30010170a.pdf

(bottom of last page for packages)

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

ETA late May 2018 for mega4809 and board :

http://new.microchipdirect.com/product/search/all/ATmega4809

via

http://www.microchip.com/wwwproducts/en/atmega4809

 

Samples may be available from a Microchip sales office :

http://www.microchip.com/distributors/SalesHome.aspx

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

js wrote:
...  but no datasheet?? surprise
Preliminary datasheet and manual arrived today :

Microchip

ATmega3209/4809 – 48-pin Data Sheet

megaAVR® 0-series

http://ww1.microchip.com/downloads/en/DeviceDoc/40002016A.pdf (774KB)

Microchip

megaAVR® 0-Series

Manual

http://ww1.microchip.com/downloads/en/DeviceDoc/40002015A.pdf (2.8MB)

via http://www.microchip.com/wwwproducts/en/atmega4809

 

Clock Controller :

Main Clock Features: – Safe run-time switching

Table 5-15. External Clock Characteristics

...

Change in period from one clock cycle to the next, 20% max

5.9 I/O Pin Characteristics

...

Rise time, 1.5ns typ (5V, 20pF)

...

Fall time, 1.3ns typ (5V, 20pF)

 

Edits: main clock, rise & fall times

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Tue. Feb 27, 2018 - 02:48 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Sampling removed.

ETA updated :

  • board 12-Mar-2018 now
  • mega4809 QFP 28-May-2018 now

http://new.microchipdirect.com/product/search/all/ATmega4809

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Sun. Mar 4, 2018 - 01:10 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

http://packs.download.atmel.com/#collapse-Atmel-ATmega-DFP-pdsc

1.2.209 (2018-02-19)

Corrected reset pin configurations and changed PORTMUX signal names for ATmega4809, ATmega4808, ATmega3209 and ATmega3208.  ...

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

48-pin QFN/TQFP! Why? It doesn't exist in my PCB package so I will need to make one up if ever I want use them chips.
 

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

js wrote:

48-pin QFN/TQFP! Why? It doesn't exist in my PCB package so I will need to make one up if ever I want use them chips.

What are you waiting for, get to it!

"I may make you feel but I can't make you think" - Jethro Tull - Thick As A Brick

"void transmigratus(void) {transmigratus();} // recursio infinitus" - larryvc

"It's much more practical to rely on the processing powers of the real debugger, i.e. the one between the keyboard and chair." - JW wek3

"When you arise in the morning think of what a privilege it is to be alive: to breathe, to think, to enjoy, to love." -  Marcus Aurelius

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Well I AM semiretired, so don't really care much for the extra stress. cheeky

 

And 0.5mm is just about out of my visual comfort, I can do it if I have to otherwise it's all up to the younger generation.

 

Just finished testing and calibrating 500 boards, I can now restart on the next crop of vegies for winter. Much less stressful.

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 1

js wrote:
Well I AM semiretired, so don't really care much for the extra stress. cheeky
The more I say that I am semi-retired, the more my wife keeps proving me wrong!wink

"I may make you feel but I can't make you think" - Jethro Tull - Thick As A Brick

"void transmigratus(void) {transmigratus();} // recursio infinitus" - larryvc

"It's much more practical to rely on the processing powers of the real debugger, i.e. the one between the keyboard and chair." - JW wek3

"When you arise in the morning think of what a privilege it is to be alive: to breathe, to think, to enjoy, to love." -  Marcus Aurelius

Last Edited: Tue. Feb 27, 2018 - 09:41 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Interesting chips. A quick datasheet skim shows...

 

3/4 USARTs, you even get 3 in the 28-pin SSOP

5V operation

No external high-speed crystal option. It's 32k or ext cll only

Internal 16MHz or 20MHz, fuse selectable

The dataspace mapped code implies that 48k will probably be the code limit

6k SRAM

11 choices of main clock prescaler

 

 

[E2A]

Hmmm, no PTC channels in a clear distinction to the tiny1 series.

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

Last Edited: Tue. Feb 27, 2018 - 09:06 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Though doesn't answer your question (IIRC Rimu), the footprint for TQFP-48 may be in KiCad :

https://github.com/KiCad/kicad-footprints/blob/master/Package_QFP.pretty/TQFP-48_7x7mm_P0.5mm.kicad_mod

 


Rimu PCB

http://www.alpro.pl/hs/rimuuk.html

http://kicad-pcb.org/

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Tue. Feb 27, 2018 - 01:21 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Brian Fairchild wrote:
Hmmm, no PTC channels in a clear distinction to the tiny1 series.
PTC is also in PB megaAVR.

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Maybe there will be a mega-1 series with PTC?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

PTC?  don't ya just love TLA's! 

 

 

Jim

 

 

(Possum Lodge oath) Quando omni flunkus, moritati.

"I thought growing old would take longer"

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

TLA's FTW!

 

edit: The PTC is the "peripheral touch controller".

Last Edited: Tue. Feb 27, 2018 - 03:31 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Microchip Technology Inc

Microchip

Press Release

Digital Control Meets Intelligent Analog to Streamline Design

Simplify development of traditionally complex designs with new PIC® and AVR® families featuring Core Independent Peripherals and Intelligent Analog

Chandler, Arizona, Feb. 27, 2018

https://www.microchip.com/en/pressreleasepage/digital-control-meets-intelligent-analog

...

The new PIC16F18446 family of microcontrollers are ideal components for use in sensor nodes.

...

 

The introduction of the ATmega4809 brings a new series of megaAVR® microcontrollers that were designed to create highly responsive command and control applications. 

...

The ATmega4809 has been selected to be the on-board microcontroller of a next-generation Arduino board.

...

 

Development Tools

...

Rapid prototyping with the ATmega4809 is supported by the ATmega4809 Xplained Pro (ATmega4809-XPRO) evaluation kit. 

...


https://plus.google.com/+MicrochipTech/posts/K7z8yfvoJza

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

The ATmega4809 has been selected to be the on-board microcontroller of a next-generation Arduino board.

 

That is really sad news if they run 20MHz with +-2% :( 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

sparrow2 wrote:

That is really sad news if they run 20MHz with +-2% :( 

 

For not much money they could put a crystal oscillator on the board.

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

These chips can only take a 32kHz crystal or an external clock generator. So you either calibrate the internal oscillator based on a 32kHz crystal in software, or use a clock generator, which is more expensive than a simple crystal.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

El Tangas wrote:

...or use a clock generator, which is more expensive than a simple crystal.

 

Surprisingly cheap in quantity and from China.

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

But still cheaper to use a 328PB and then only run 16MHz. (about same price 328P @ 20MHz).

This chip also only have 256 Byte EEPROM, registers aren't memory mapped , so there are many changes.

 

 

  So you either calibrate the internal oscillator based on a 32kHz crystal in software

But the step size in speed @20MHz are big, so even perfect setting will not be better than about 1%.

 

And yes for the UART it can be taken care of , and for long time just use the RTC, but just a lot of changes.  

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Oh, ok I see, the steps are about 400kHz so you can never calibrate better than ± 1%.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Don't get me wrong it's a good chip for the price, just not only good things compared to a 328P.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 1

New Microchip announcement on this here on the Freaks Forum, today.

 

So Microchip, back in the day when a new product was release Atmel would sometimes send out a bunch of the chips, kits, or boards to a number of AVR Freaks members.

I recall receiving a security kit, and the RZ Raven kit, and perhaps a couple others over the years.

 

The up side to this plan, no doubt written off to marketing, was that the new hardware was instantly in the hands of a number of experienced users who were very familiar with the IDE and with how things usually work, and who could take the new hardware for a test drive and quickly turn up any chip die errors, or data sheet errors, before the Revision B chip design was committed.

 

Besides the free "Beta-testing" (of a released product...), there was also, of course, a lot of free publicity on the new product.

 

 /<Hint hint>

 

JC  wink

 

 

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

DocJC wrote:
New Microchip announcement on this here on the Freaks Forum, today.
Late too, already in post #34 above.wink

"I may make you feel but I can't make you think" - Jethro Tull - Thick As A Brick

"void transmigratus(void) {transmigratus();} // recursio infinitus" - larryvc

"It's much more practical to rely on the processing powers of the real debugger, i.e. the one between the keyboard and chair." - JW wek3

"When you arise in the morning think of what a privilege it is to be alive: to breathe, to think, to enjoy, to love." -  Marcus Aurelius

Last Edited: Wed. Feb 28, 2018 - 10:28 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Late" is relative.

Time is in someways meaningless.

 

The press release and social media threads were created approx 1200 MT which is approx 2000 CET likely after Microchip Norway COB.

Having 8-bit design centers around the world is good ... unless a director or executive has your mobile contact information wink

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Microchip Technology Inc

Microchip

Product Change Notification - SYST-26JZNY375 - 28 Feb 2018 - ERRATA - megaAVR® 0-series Errata Errata Document Revision

http://www.microchip.com/mymicrochip/NotificationDetails.aspx?pcn=SYST-26JZNY375

...

Description of Change: Initial release of the document.
...

Attachment(s):

megaAVR 0-series Errata

...

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

data sheet sec 7.5.6:

For a write operation, the low byte of the 16-bit register must be written before the high byte. ??!!??

 

Is this chip different than other AVR chips (such as a mega88pa):

To do a 16-bit write, the high byte must be written before the low byte. For a 16-bit read, the low byte must be read

before the high byte.

 

Not sure if this means anything...maybe it implies a direct write, rather than a sequence of steps...I hope the program can write to the eeprom1

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

ETA late May 2018 for mega4809 and board :

http://new.microchipdirect.com/product/search/all/ATmega4809

why is the board $38, while this board is $8.88:

http://www.microchip.com/Developmenttools/ProductDetails.aspx?PartNO=ATMEGA328PB-XMINI

 

Hope some Chinese versions appear

 

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

16 bit access has been changed since the xmega series.
Writing from program to EEPROM is possible via NVMCTRL. This is also as usual.

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

avrcandies wrote:

ETA late May 2018 for mega4809 and board :

http://new.microchipdirect.com/product/search/all/ATmega4809

why is the board $38, while this board is $8.88:

http://www.microchip.com/Developmenttools/ProductDetails.aspx?PartNO=ATMEGA328PB-XMINI

 

Well, one is xplained "pro", the other "mini".

 

avrcandies wrote:

Hope some Chinese versions appear

 

According to the Microchip press release linked in post #34, a new version of Arduino will have this chip. I'm sure Chinese copies will follow in due time.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Well, one is xplained "pro", the other "mini".

what does that mean?  $38 vs $9...what do you get for the difference? 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

16 bit access has been changed since the xmega series.

do you know when/where (has that been specifically mentioned)?  There have been some datasheets that have been in error 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Microchip

megaAVR® 0-Series

Manual

http://ww1.microchip.com/downloads/en/DeviceDoc/40002015A.pdf (2.8MB)

Unified memory with a nonvolatile memory controller yet three references to instances of the SPM instruction.

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Sun. Mar 4, 2018 - 12:07 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

avrcandies wrote:

Well, one is xplained "pro", the other "mini".

what does that mean?  $38 vs $9...what do you get for the difference? 

 

Well, there are differences, I doubt they justify $30 though. I'll compare the tiny817, which has both versions:

 

Tiny 817 Mini:

 

Tiny 817 Pro:

 

So the pro has a few more features, uses the EDBG debugger instead of the mEDBG which is kinda slow.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Core-Independent Peripherals"?

 

Can someone tell me what this means? Independent clock system? Independent in some other way?

 

Jim

 

Until Black Lives Matter, we do not have "All Lives Matter"!

 

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Well, LMGTFY:

Core Independent Peripherals are designed to handle their tasks with no code or supervision from the CPU to maintain operation. As a result, they simplify the implementation of complex control systems and give designers the flexibility to innovate.

 

http://www.microchip.com/design-centers/8-bit/peripherals/core-independent/overview

cheeky 

Top Tips:

  1. How to properly post source code - see: https://www.avrfreaks.net/comment... - also how to properly include images/pictures
  2. "Garbage" characters on a serial terminal are (almost?) invariably due to wrong baud rate - see: https://learn.sparkfun.com/tutorials/serial-communication
  3. Wrong baud rate is usually due to not running at the speed you thought; check by blinking a LED to see if you get the speed you expected
  4. Difference between a crystal, and a crystal oscillatorhttps://www.avrfreaks.net/comment...
  5. When your question is resolved, mark the solution: https://www.avrfreaks.net/comment...
  6. Beginner's "Getting Started" tips: https://www.avrfreaks.net/comment...
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

ka7ehk wrote:

"Core-Independent Peripherals"?

 

Over in PIC-world a CIP is a peripheral with 'smarts', as an example...

 

https://www.microchip.com/design...

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

El Tangas wrote:
the pro has a few more features

The Pros are usually bigger boards (and bigger processors), and come populated with the XPro headers - so that you can plug on XPro expansion boards.

 

 

As the name (and price) suggests, the Minis are smaller and don't have the extras.

ATTINY817-XMINI Microchip Technology | ATTINY817-XMINI-ND DigiKey Electronics

 

EDIT

 

Actual picture of the ATtiny817 Xplained Pro:

http://www.microchip.com/DevelopmentTools/ProductDetails.aspx?PartNO=ATTINY817-XPRO

Top Tips:

  1. How to properly post source code - see: https://www.avrfreaks.net/comment... - also how to properly include images/pictures
  2. "Garbage" characters on a serial terminal are (almost?) invariably due to wrong baud rate - see: https://learn.sparkfun.com/tutorials/serial-communication
  3. Wrong baud rate is usually due to not running at the speed you thought; check by blinking a LED to see if you get the speed you expected
  4. Difference between a crystal, and a crystal oscillatorhttps://www.avrfreaks.net/comment...
  5. When your question is resolved, mark the solution: https://www.avrfreaks.net/comment...
  6. Beginner's "Getting Started" tips: https://www.avrfreaks.net/comment...
Last Edited: Thu. Mar 1, 2018 - 07:01 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

(future) product web pages with preliminary datasheets were created for the 28-pin and 32-pin variants :

http://www.microchip.com/wwwproducts/en/ATMEGA3208

http://www.microchip.com/wwwproducts/en/ATMEGA4808

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

5.9 I/O Pin Characteristics

...

Rise time, 1.5ns typ (5V, 20pF)

...

Fall time, 1.3ns typ (5V, 20pF)

The LC filter on mega4809's AVDD in Xplained Pro :

  • ferrite bead, Murata BLM18PG471SN1, 1A, 470 ohms at 100MHz, 260mohm max ESR, 1608 metric
  • capacitor, 100nF MLCC 16V X7R

The same ferrite bead is on UC3A4 (EDBG) VDDANA and UC3A4 USB_VBUS.

USB VBUS is filtered; external 5V power is not filtered.

 

P.S.

megaAVR 0-series schematic checklist?

Reason: IO rise and fall times are greatly less than PB megaAVR.

or is the AVR EMC application note adequate?

 


https://www.mouser.com/Search/Refine.aspx?Keyword=BLM18PG471SN1

https://www.mouser.com/new/murataelectronics/murata-blm-emi-filter/

Microchip Technology Inc

Microchip Technology

Application Notes

AN_1619 AVR040: EMC Design Considerations

http://www.microchip.com//wwwAppNotes/AppNotes.aspx?appnote=en590907

via http://www.microchip.com/wwwproducts/en/atmega324pb

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

kabasan wrote:

 16 bit access has been changed since the xmega series.

Yes, this note appears in the Xmega timer manual (AVR1306):

       ...Note that on the XMEGA, the byte order for multi-byte access is always from the least significant byte to the most significant byte.

 

So does the megaAVR 0-series follow along with Xmega, or use the classic mega avr sequence?  

 

They had the datasheet for the mega328PB reversed (following xmega) & finally corrected it: 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

YouTube

ATmega4809 8-bit High-Performance AVR CPU

Microchip Technology

Published on Feb 27, 2018

https://www.youtube.com/watch?v=SScQqkGWoB0 (4m35s)

via https://plus.google.com/+MicrochipTech/posts/dUMpErLv4cy

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

EDN

New brain for the Arduino, and…PICkit 4

by  (EDN Editor in Chief)

March 02, 2018

https://www.edn.com/electronics-products/electronic-product-reviews/other/4460386/New-brain-for-the-Arduino--and-PICkit-4

...

... it [mega4809] shares the basic characteristics of the somewhat-stuck-in-time AVR family. 

...

Onto Microchip’s most-loved child, the PIC. The new PIC16F18446 is another overachiever when it comes to peripherals. 

...

Finally, there’s the new PICkit 4 programmer/debugger ($48). Let’s hope it rights some of the wrongs perpetrated by the deposed PICkit 3. Especially, in my case, the inability to function at the 3V of my project! On the plus side, brownie points to any company that offers multi-platform support (it works under MacOS, Linux, and even Windows).

...

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 1

In the March 7, 2018 Embedded.com newsletter, Mega4809 is going to be the new Arduino MCU.

 

https://www.embedded.com/electro...

 

Jim

 

Until Black Lives Matter, we do not have "All Lives Matter"!

 

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

ka7ehk wrote:
In the March 7, 2018 Embedded.com newsletter, Mega4809 is going to be the new Arduino MCU.
I think that is absolutely fantastic!  Simonetta is going to have to change the Mantra!

"I may make you feel but I can't make you think" - Jethro Tull - Thick As A Brick

"void transmigratus(void) {transmigratus();} // recursio infinitus" - larryvc

"It's much more practical to rely on the processing powers of the real debugger, i.e. the one between the keyboard and chair." - JW wek3

"When you arise in the morning think of what a privilege it is to be alive: to breathe, to think, to enjoy, to love." -  Marcus Aurelius

Last Edited: Thu. Mar 8, 2018 - 09:56 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Blinky :

YouTube

Getting Started with the ATmega4809

Microchip Technology

Published on Feb 27, 2018

https://www.youtube.com/watch?v=HUPSwIp-09E (1m39s)

This Xplained Pro board features the newly released ATmega4809 microcontroller. This device is packed with features such as Core Independent Peripherals, Event System, Intelligent Analog and Low Power. Programming the Xplained Pro board is easy and fast with Atmel Studio and Atmel Start. In this video we are demonstrating how you can get up and running with the Xplained Pro board with a Blink application in minutes.

via https://plus.google.com/+MicrochipTech/posts/NcA9HnJsZX7

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

YouTube

Microchip

eeNews Report on Embedded World 18

https://youtu.be/3Lq3Qh4ue7w?t=4m24s (mega4809 for almost 2m duration, earlier is a new PIC with a 12b ADC and doubled flash and RAM)

via 

Lucio Di Jasio discusses the latest additions to our portfolio of 8-bit micro...

https://plus.google.com/+MicrochipTech/posts/gVm4WS3Wnjf

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

The ATmega4809 has been selected to be the on-board microcontroller of a next-generation Arduino board.

Will the mega4809 Arduino have EDBG?

(no answer is likely the best answer assuming there's an NDA in place)

Likely yes (mEDBG) due to mega32U4; see https://www.avrfreaks.net/forum/megaavr-0-series?page=1#comment-2470876

Reasons :

  1. Arduino Zero has EDBG
  2. Microsoft Arduino extension to Visual Studio Code

 

https://store.arduino.cc/usa/arduino-zero

Visual Studio Marketplace

Arduino

https://marketplace.visualstudio.com/items?itemName=vsciot-vscode.vscode-arduino

(2/3 page)

Debugging Arduino Code preview

[Arduino Zero, EDBG]

AVR Studio On Mac & Linux?

by ka7ehk

https://www.avrfreaks.net/forum/avr-studio-mac-linux

...

https://www.avrfreaks.net/forum/avr-studio-mac-linux#comment-2440271

 

Edits: strikethru, mEDBG

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Sat. May 19, 2018 - 06:43 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Rapid prototyping with the ATmega4809 is supported by the ATmega4809 Xplained Pro (ATmega4809-XPRO) evaluation kit.

New arrival at Mouser :

Mouser Electronics  - Electronic Components Distributor

Microchip Technology

Mouser

Microchip Technology

ATmega4809 Xplained Pro Evaluation Kit

https://www.mouser.com/new/microchip/microchip-atmega4809-xpro/

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

ARDUINO UNO WiFi REV2

https://store.arduino.cc/arduino-uno-wiFi-rev2

Arduino Uno form, ATmega4809, ATECC608, IMU, Wi-Fi System-on-Chip

[ATmega4809, Wi-Fi SoC, IMU, ATECC608A crypto-authenticator]

via

Arduino Blog » Say hello to the next generation of Arduino boards!

by Arduino Team

May 17th, 2018

https://blog.arduino.cc/2018/05/17/say-hello-to-the-next-generation-of-arduino-boards/

...

Those heading to Maker Faire this weekend are invited to attend Massimo Banzi’s semi-annual ‘State of Arduino’ talk, where you can learn more about our latest developments including the MKR Vidor 4000, Uno WiFi Rev2, and our Arduino Day releases.

Both the MKR Vidor 4000 and Uno WiFi Rev2 will be available on the Arduino online store at the end of June.

via https://plus.google.com/u/0/106109247591403112418/posts/AmQsbfVdtb4 (404 error)

 


https://www.microchip.com/wwwproducts/en/ATMEGA4809

https://www.microchip.com/wwwproducts/en/ATECC608A

https://www.u-blox.com/en/product/nina-w10-series

 

Edit : tech specs tab added to https://store.arduino.cc/arduino-uno-wiFi-rev2

Edit : strikethru

Edit : 404

Edit: Wi-Fi module's URL

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Sun. Aug 12, 2018 - 07:14 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

gchapman wrote:

ARDUINO UNO WiFi REV2

https://store.arduino.cc/arduino-uno-wiFi-rev2

 

 

Hmm, that says "It has 14 digital input/output pins (of which 6 can be used as PWM outputs), 6 analog inputs, a 16 MHz ceramic resonator, a USB connection, a power jack, an ICSP header, and a reset button. "

 

- but the image shows a crystal on the Mega23U, and what looks like just 32KHz support (EPSON?) on 4809 ? Or has the 4809 secretly added Crystal Oscillator back into the mix ?

Or is this just lazy copy/paste ?

 

 

Other designs have allowed a CLK out from the Debug chip, to feed the MCU, but I don't think they did that here ?

Any Schematics ?

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Is that a thermal relief around the thermal pad of that voltage regulator?

Doing magic with a USD 7 Logic Analyser: https://www.avrfreaks.net/comment/2421756#comment-2421756

Bunch of old projects with AVR's: http://www.hoevendesign.com

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Paulvdh wrote:

Is that a thermal relief around the thermal pad of that voltage regulator?

 

Looks like it - did you not expect that ?

Fairly common to do that to help better soldering flows. The added thermal resistance is tiny, compared to all the J-A adders.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Who-me wrote:
... and what looks like just 32KHz support (EPSON?) on 4809 ? 
Yes

Who-me wrote:
Or has the 4809 secretly added Crystal Oscillator back into the mix ?
No

Who-me wrote:
Or is this just lazy copy/paste ?
A mistake

Who-me wrote:
Other designs have allowed a CLK out from the Debug chip, to feed the MCU, but I don't think they did that here ?
EXTCLK goes to a via then to ?

An educated guess is EXTCLK is connected to mega32U4 high speed T/C 4 OC.4A or its CLKO.

tiny817 Xplained Mini mEDBG has an optional clock out to the tiny817.

mega4809 Xplained Pro has mega4809 EXTCLK to a header pin.

Who-me wrote:
Any Schematics ?
Couldn't locate it from a first guess on a location.

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Sat. May 19, 2018 - 07:55 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hackaday.io

ATMega4809 developing board project

https://hackaday.io/project/134831-atmega4809-developing-board-project/

mega4809, mega88PA for UPDI, FTDI FT2232D USB dual UART, OLED

Details

Blinky test on ULTRA 4809 Explorer

https://hackaday.io/project/134831-atmega4809-developing-board-project/log/146590-blinky-test-on-ultra-4809-explorer

...

In the working directory, we also need  "avrdude.conf", which is available at ELTangas's jtag2updi repository.

...

via https://plus.google.com/u/0/106109247591403112418/posts/fBB4ycKiQTi

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

    I thought they resist to add Xmega to Arduino in order to be consistent on using the Mega328. Now I see they skip Xmega. Why ? What's wrong with Xmega ?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

angelu wrote:

    I thought they resist to add Xmega to Arduino in order to be consistent on using the Mega328. Now I see they skip Xmega. Why ? What's wrong with Xmega ?

 

3.3v only operation ?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Nice, I'm happy that someone is using my programmer software on a product. From my github traffic, I can add that this board can be purchased here: https://www.tindie.com/products/...

 

And the fact that in this board an atmega88 is used to host the firmware made me notice that I can easily reduce the size of an array (I left a huge safety margin) and make it fit in an atmega48. That would save a few cents to the designer, not that it really matters in this case.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Dare to be naïve." - Buckminster Fuller

Last Edited: Sun. Jul 8, 2018 - 04:45 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

In Bob Martin's right hand is what appears to be an Arduino Uno WiFi rev 2 :

https://plus.google.com/+MicrochipTech/posts/PriSVyixBd6

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

gchapman wrote:

In Bob Martin's right hand is what appears to be an Arduino Uno WiFi rev 2 :

What's with the clear plastic holder / case thingy ?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Maybe it's the display model from the Bay Area Maker Faire (mid-May'18)

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

wafer fabrication is by Microchip :

Microchip Technology Inc

Product Change Notification - GBNG-06LXXH156 - 25 Jun 2018 - CCB 2856 Final Notice: Qualification of Microchip Fabrication site (FAB 4) for selected Atmel products manufactured with the 59.91K process technology.

http://www.microchip.com/mymicrochip/NotificationDetails.aspx?pcn=GBNG-06LXXH156

https://www.microchip.com/mymicrochip/Data/GBNG-06LXXH156/GBNG-06LXXH156_Affected_CPN_06252018.pdf

...

 

Affected Catalog Part Numbers (CPN)

...

ATMEGA4809-MFR

ATMEGA3209-MFR

ATMEGA4808-MFR

ATMEGA3208-MFR

ATMEGA4808-AFR

ATMEGA3208-AFR

ATMEGA4809-AFR

ATMEGA3209-AFR

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Do we have any idea what is "59.91k process technology" ?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Was curious myself.  Google just points me to Microchip PCNs.

"Experience is what enables you to recognise a mistake the second time you make it."

"Good judgement comes from experience.  Experience comes from bad judgement."

"Wisdom is always wont to arrive late, and to be a little approximate on first possession."

"When you hear hoofbeats, think horses, not unicorns."

"Fast.  Cheap.  Good.  Pick two."

"We see a lot of arses on handlebars around here." - [J Ekdahl]

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Dare to be naïve." - Buckminster Fuller

Last Edited: Thu. Dec 27, 2018 - 11:52 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Arduino - ArduinoUnoWiFiRev2

Getting started with the Arduino Uno WiFi Rev2

https://www.arduino.cc/en/Guide/ArduinoUnoWiFiRev2

...

 

Please Read...

https://www.arduino.cc/en/Guide/ArduinoUnoWiFiRev2#toc11

...

The programming of the MEGA4809 happens through an ATmega 32U4 programmed with the mDBG code and creates a virtual COM port when connected to a PC.

...

Last revision 2018/06/26 by SM 
...

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

mDBG? Do they mean mEDBG?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Yes though there's not much mEDBG at arduino.cc

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

mega3209 is a new arrival at Mouser :

https://www.mouser.com/new/microchip/microchip-atmega3209-mcu/

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

A wee bit more information in an interview of Fabio Violante (Arduino CEO) by Microchip's Bob Martin at the 2018 Bay Area Maker Faire.

Arduino and the Maker Movement: A conversation with Arduino’s CEO - YouTube

Microchip Technology

Jul 18, 2018

https://youtu.be/xFD6c_FhL2Q?t=3m35s for 1m45s

earlier in the video is on Arduino's MKR (SAM D21) series with a goal of low-rate production for customers in addition to prototyping. 

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

HP InfoTech

CodeVisionAVR V3 Revision History

http://hpinfotech.ro/cvavr_revision3.html

...

V3.33 Commercial Release

  • Compiler

...

  • Added compiler support for the AVR8X ATmega3208/3209/4808/4809 chips
  • Improved the code generated for the AVR8X chips

...

  • Fixed: @ operator address check for AVR8X EEPROM variables

...

 

  • CodeWizardAVR
    • Added a new Wizard for the AVR8X chips: ATtiny414/416/1614/1616/1617 and ATmega3208/3209/4808/4809

...

 

  • Chip Programmer
    • Added support for the Microchip EDBG programmer

...

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

YouTube

How to Use the Event System with AVR® ATmega4809

Microchip Technology

Aug 21, 2018

https://www.youtube.com/watch?v=WosagCSKdng (3m47s)

Have you ever wanted to periodically sample an ADC without using code? Have you ever wanted to trigger sensor readings without using CPU resources to do so? The Event System is a feature on some newer AVR® devices that allows autonomous communication between peripherals. This means that you can now trigger sensors, timers, and readings without needing CPU intervention. In this tutorial we will not only cover how to set up the Event System on an AVR device; but we will also cover how to utilize this feature to take more workload off of your CPU.

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

The forthcoming Microchip alternative :

https://www.microchip.com/wwwproducts/en/ATMEGA4809

Development Environment tab

...

(bottom)
AVR.IoT ATmega4808 WiFi ( AC164160 )

Hopefully will have EDBG instead of mEDBG (speed, etc); maybe nEDBG is good enough.

Likely will have a Microchip Wi-Fi module instead of an ESP32 module.

 

On same page is

ATmega4809-CNANO ( DM320115 )

...

(the fuzzy picture)
mega4809 with debugger on a breakout that's all pins (it's long) and 600mil wide, push button, LED is likely

NANO may mean nEDBG.

nEDBG is on the PIC16F18446 Sensor Board.

https://www.microchip.com/wwwproducts/en/PIC16F18446

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Arduino Uno WiFi Rev2 will be a new arrival at Mouser with an ETA of 06-Nov-18. 31-Oct-18

https://www.mouser.com/new/arduino/arduino-uno-wifi-rev2/

 

Edits: typo, strikethru

 

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Wed. Oct 31, 2018 - 01:24 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Microchip logo

Microchip Technology

Press Release

Create Secure Connected Applications in a Single Click with Microchip’s AVR MCU Development Board for Google Cloud

New solution enables developers to easily deploy IoT devices to Google Cloud IoT Core’s artificial intelligence and machine learning infrastructure

Chandler, Arizona

October 10, 2018

https://www.microchip.com/en/pressreleasepage/AVR-IoT-WG-development-board

...

The AVR-IoT WG Development Board gives developers the ability to add Google Cloud connectivity to new and existing projects with a single click using a free online portal at www.AVR-IoT.com.

...

  • Powerful AVR microcontroller (MCU) with integrated peripherals: The ATmega4808 8-bit MCU brings the processing power and simplicity of the AVR architecture with added advanced sensing and robust actuation features. With the latest Core Independent Peripherals (CIPs) that decrease power consumption, it provides cutting-edge performance in real-time sensing and control applications.

[ATECC608A, ATWINC1510]

...

 

Pricing and Availability

The AVR-IoT WG Development Board (AC164160) is available in volume production now for $29 each. For additional information, contact a Microchip sales representative, authorized worldwide distributor or visit Microchip’s website. To purchase products mentioned in this press release, visit the AVR-IoT portalvisit our purchasing portal or contact one of Microchip’s authorized distribution partners.

 

...

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

AVR IoT WG Development Board Introduction - YouTube

by Microchip Technology

Oct 10, 2018

https://www.youtube.com/watch?v=BqjFZjdBLH8 (3m56s)

via https://plus.google.com/+MicrochipTech/posts/X12HREh5HHT

 

Everything Supercon: This. Is. Big. | Hackaday

by 

October 8, 2018

https://hackaday.com/2018/10/08/everything-supercon-this-is-big/

...

Come one, come all, this is the megapost about the Hackaday Superconference. Join us in Pasadena on November 2-4 for the hardware conference you cannot miss. Get your ticket quickly as they will sell out!

...

Prototyping IoT Applications Using the AVR-IoT WG Development Board

...

via https://plus.google.com/+MicrochipTech/posts/6LTrUeocKu6

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 1

I'm sure it will be a great conference, but this November I'm going to Electronica, it's closer to home and my funds are not unlimitedfrown

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Getting Started With Your AVR-IoT WG Development Board - YouTube

by Microchip Technology

Oct 10, 2018

https://www.youtube.com/watch?v=WK4ljyKDMIQ (6m26s)

via https://plus.google.com/+MicrochipTech/posts/7pLed2HKFf5

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

http://packs.download.atmel.com/#collapse-Atmel-ATmega-DFP-pdsc

1.2.272 (2018-09-14)

Corrected CLKCTRL signals, ALT out signals and interrupt edge triggering values for CCL and added SEQCTRL1 for ATmega4809, ATmega4808, ATmega3209 and ATmega3208.

Corrected RW status on MCLKSTATUS register.

...

Added ATmega1609, ATmega1608, ATmega809 and ATmega808.

...

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

gchapman wrote:

...

Added ATmega1609, ATmega1608, ATmega809 and ATmega808.

...

 

 

Interesting. So that's (likely) the megaAVR 0-series family complete. You can't go bigger than 48k because of the way the memory is mapped, it probably doesn't make sense to go smaller than 8k, it also probably doesn't make sense to go more than 48 pins, and you'd never fit all the functionality is less than 28 pins.

 

The tinyAVR 1-series is looking to be complete, unless there are plans for 48k devices, as is the tinyAVR 0-series.

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

It seems I also need to add the ATmega1609, ATmega1608, ATmega809 and ATmega808 to the avrdude.conf file in my programmer.

 

BTW, tiny3204, tiny3206 and tiny3207 are also missing in my avrdude.conf, but they don't seem to be planed even as future products.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Brian Fairchild wrote:
So that's (likely) the megaAVR 0-series family complete.
USB megaAVR are popular.

Prediction - megaAVR 1-series

Updated USB device controller, unified memory, ...

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Currently future product :

ATmega1609

ATmega1608

ATmega809

ATmega808

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

the overview say :

 The series uses the latest Core Independent Peripherals with low power features.

is that new version or just a bug fixed one ? 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

IIRC, CIP is from the PIC side of the house.

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

CIP is from the PIC side of the house.

If you say so.  I always thought that Microchip's "Core Independent Peripherals" and Atmel's "Event System" and/or "Sleepwalking peripherals" were approximately the same thing.  (though I haven't looked at either one in enough detail to see if there are any important differences.)

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

It's my assumption.

In '11, became aware of the Charge Time Measurement Unit (CTMU) in some PIC18F where the CTMU is sensing touch buttons while the CPU sleeps.

Atmel QTouch is implemented by library software (CPU) that was improved by some PB megaAVR with the Peripheral Touch Controller (PTC)

AVR32 UC3L has an autonomous touch button hardware interface (Capacitive Touch or CT) to wake the CPU.

 

Waking up a capacitive touch-sensing device with an MCU peripheral

Nithin Kumar Mada and Harsha Jagadish, Microchip Technology - July 27, 2011

 

When a capacitive touch screen goes into sleep or standby mode to save energy, how can you design the system to wake up quickly without degrading its performance or burning a lot of power. Here are two options: a traditional method and a new MCU-based method. 

https://www.embedded.com/print/4218309

Microchip Technology

Overview of Charge Time Measurement Unit (CTMU)

https://www.microchip.com/stellent/groups/SiteComm_sg/documents/DeviceDoc/en542792.pdf

...

 

(page 32)

Other Applications of CTMU

[capacitance sensing, TDR, precise time, temperature sensing, humidity sensing, DAC]

 

...

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 2

The code for the new ATmega4809-based Arduino board has been checked in:

https://github.com/arduino/ArduinoCore-megaavr

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

    How they run it at 16MHz ? I thought it will run at 20MHz. Is the schematic available ?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Couldn't quickly locate the schematic of Arduino Uno WiFi rev2.

Its competitor is AVR-IOT WG Development Board

AVR-IOT WG's mega4808 is on page 3 at B3 :

http://ww1.microchip.com/downloads/en/DeviceDoc/AVR-IoT_WG_Schematics.pdf

To megaAVR 0-series UARTs were added autobaud (BREAK, SYNC, data) and FBRG.

AVR-IOT WG's nEDBG SAMD21 (page 2, C5) has access to USB SOF for creation of an accurate internal clock.

 

Edit: page 2

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Wed. Oct 31, 2018 - 07:25 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

angelu wrote:

    How they run it at 16MHz ? I thought it will run at 20MHz. Is the schematic available ?

 

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

ATmega4809 Curiosity Nano

has separate LDO for mega4809 and nEDBG SAMD21 such that mega4809 VCC can be nearly USB VBUS.

http://ww1.microchip.com/downloads/en/DeviceDoc/ATmega4809_Curiosity_Nano_Schematics.pdf

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

in stock

lead time is 15 weeks

ABX00021 Arduino (Uno WiFi Rev2) | Mouser

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

angelu wrote:
Is the schematic available ?
ARDUINO UNO WiFi REV2, documentation tab

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

gchapman wrote:

angelu wrote:
Is the schematic available ?
ARDUINO UNO WiFi REV2, documentation tab

 

That's a lot of level shifters.

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

And man, that power supply just keeps getting more and more complicated.  Six transistors, now!  (oh wait - the opamp is gone...)

Am I missing something?   Were there spectacular problems with the old design?  Is there something wholy awful about a couple of diodes?

(and you'd think that someone would have put this whole "USB or external power to 5 and 3V @500mA total" on a single chip/module by now...)

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Did someone test the Arduino Uno WiFi Rev 2 ?

 

It is very strange to see "coming soon" at the Arduino store, as if it had not arrived !

But it is available at Mouser ...

Bernard.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Did someone test the Arduino Uno WiFi Rev 2 ?

No, but I've been playing with the code using an Xplained Pro board.

That's the lovely thing about Open Source - you can analyze it, criticize it, submit bugs, even write fixes, all without actually contributing to the vendor's revenue stream!

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

You're onto something really handy (breadboards, typical protoboards)

top left at ATMEGA4809 - 8-bit AVR Microcontrollers - Microcontrollers and Processors

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

gchapman wrote:

You're onto something really handy (breadboards, typical protoboards)

top left at ATMEGA4809 - 8-bit AVR Microcontrollers - Microcontrollers and Processors

 

Do you think they'll come with a DIP40 version of the 4809?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Dare to be naïve." - Buckminster Fuller

Last Edited: Sat. Jan 26, 2019 - 05:26 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 1

Arduino Uno WiFi (the one with the mega4809 on it) is now in stock at Farnell...

 

 

https://uk.farnell.com/arduino/a...

 

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 2

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

So is there compiler support for putting tables of constants in .text, and then reading it via ldd/etc in the shared address space?
First looks says the shared space doesn’t help much - foo[x] gets pretty much exactly the Same code up until the actual spm instruction vs “ld r,Z”, for maybe a 10% improvement in cycle count. But there should be many more options for fetching the data - X and Y in addition to Z, plus ldd,plus the extra addressing modes...

I assume I could manually put data in .text via the section attribute, but I was hoping for something prettier, and “official”

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Aren't you just talking about PROGMEM (C++) or __flash (C) ?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

westfw wrote:
So is there compiler support for putting tables of constants in .text, and then reading it via ldd/etc in the shared address space? First looks says the shared space doesn’t help much - foo[x] gets pretty much exactly the Same code up until the actual spm instruction vs “ld r,Z”, for maybe a 10% improvement in cycle count. But there should be many more options for fetching the data - X and Y in addition to Z, plus ldd,plus the extra addressing modes... I assume I could manually put data in .text via the section attribute, but I was hoping for something prettier, and “official”
The real improvement would be to get rid of those strcpy/strcpy_P functions and having a single set. I'm looking for this high level support. I don't care if the strcpy_P will be 10% faster because of the low level support of addressing modes, as long as I will still be forced to use strcpy_P functions.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

rammon wrote:
The real improvement would be to get rid of those strcpy/strcpy_P functions and having a single set. I'm looking for this high level support. I don't care if the strcpy_P will be 10% faster because of the low level support of addressing modes, as long as I will still be forced to use strcpy_P functions.
But do that would really require __flash and C++ to be combined. Then you could have overloaded versions of strcpy() etc that are simply based on whether the parameters have "const _flash" modifiers. I suppose this might be possible with "const" alone but then you are effectively saying the RAM one has the potential to modify its parameters.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

clawson wrote:

rammon wrote:
The real improvement would be to get rid of those strcpy/strcpy_P functions and having a single set. I'm looking for this high level support. I don't care if the strcpy_P will be 10% faster because of the low level support of addressing modes, as long as I will still be forced to use strcpy_P functions.
But do that would really require __flash and C++ to be combined. Then you could have overloaded versions of strcpy() etc that are simply based on whether the parameters have "const _flash" modifiers. I suppose this might be possible with "const" alone but then you are effectively saying the RAM one has the potential to modify its parameters.

strcpy will work even in the current implementation as long as the __flash parameter will be correctly given (as the aliased address in the data space). The problem is who will give that address to the strcpy? Not me anyhow.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

rammon wrote:
The problem is who will give that address to the strcpy? Not me anyhow.
No idea what you mean. You generally use it as:

// C
const __flash char text[] = "hello"
char buff[20];

strcpy_P(buff, &text);

or

// C / C++
strcpy_P(buff, PSTR("hello"));

or

// C++
const PROGMEM char text[] = "hello"
char buff[20];

strcpy_P(buff, &text);

So the compiler provides the address to use because it knows the address of text[] or the PSTR()

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

clawson wrote:

rammon wrote:
The problem is who will give that address to the strcpy? Not me anyhow.
No idea what you mean. You generally use it as:

// C
const __flash char text[] = "hello"
char buff[20];

strcpy_P(buff, &text);

or

// C / C++
strcpy_P(buff, PSTR("hello"));

or

// C++
const PROGMEM char text[] = "hello"
char buff[20];

strcpy_P(buff, &text);

So the compiler provides the address to use because it knows the address of text[] or the PSTR()

The whole point is to use strcpy(), not strcpy_P().

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

But the whole reason why C has to have two (differently named) implementations of strcpy() is that one has to use LD and the other LPM. I suppose another alternative might have been a non-standard strcpy() with an extra parameter to identify which address space the address points to. I cannot see any mechanism (in C) that would allow for just one function - I suppose you could use a _memx pointer so that the address and the memory space flag are combined into a single parameter? But this would then be a very non-standard strcpy().

 

C++ function overloading provides a way to have two functions with the same name that do the same thing in subtly different ways but it needs to see some difference in the type of at least one of the parameters.

 

If using C have you considered a "wrapper" using __memx?

char textRAM[] = "hello";
const __flash char textFlash[] = "world";

char * Strcpy(char * dest, __memx char * src) {
    if (__builtin_avr_flash_segment(src) == -1) {
        strcpy(dest, (const char *)src);
    }
    else {
        strcpy_P(dest, (const __flash char *)src);
    }
    return dest;
}

int main(void) {
    char buff[20];

    Strcpy(buff, textRAM);
    Strcpy(buff, textFlash);
}

That does mean using Strcpy() in place of either strcpy() or strcpy_P().

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hi clawson,

Here the talk is about the new chips that have the flash (well, a part of it) mapped to the data space. 

And I said that (for me) the best value of it is if we can use this feature to get rid of the dual function thing of the standard c library (at least). To finally have a unified memory architecture (like arm, stm8) and not having to deal with different versions of the same function anymore.

If gcc can support this or not is beyond my understanding (or how hard it is).

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

rammon wrote:
If gcc can support this or not is beyond my understanding (or how hard it is)
GCC is OSS - if someone has an improvement to add to it everyone is free to contribute.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I am confused.   The AVR has an 8-bit data bus and 16-bit address bus with 16-bit-wide instructions.

 

You could map SRAM, Flash to a linear memory space but you are still stuck with 16-bit addressing.   Fine for say 40kB Flash and 24kB SFR/SRAM.

But a mega128 has got 64k instruction words and 64kB RAM addressing.

 

mega2560 or Xmega384 has got more Flash but needs a page register.

 

Yes,   I agree that an ARM has a much cleaner architecture.   Let's face it,  the AVR was pretty revolutionary when it came out.   I doubt if they even considered more than 64k words of Flash.

 

Even now,  C compilers and libraries don't handle data above 64kB very well.    Program memory works with trampolines.   Most data memory is assumed to live below 64kB.    You have to tell the linker to do things otherwise.

 

David.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

david.prentice wrote:
You could map SRAM, Flash to a linear memory space but you are still stuck with 16-bit addressing.   Fine for say 40kB Flash and 24kB SFR/SRAM.
That's exactly why these new devices have memory regions with the size restrictions they have - so everything can still be mapped into a single, linear, 64KB space.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Yes, and you shoot yourself in the foot if you produce a 40kB chip in 2017 and can never add a new family member above 56kB.
.
8-bit microcontrollers have lived with Harvard architectures for over 30 years.
Even the ARM has different address spaces. They just get mapped to a linear space.
.
The C++ compiler can distinguish for overloaded methods.
The C compiler can use __memx
.
Yes, it is irritating at times. Just live with it.
.
David.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

  Fine for say 40kB Flash and 24kB SFR/SRAM

But that is what a 4809 has:

48k Flash

6k RAM

and the rest is IO etc.

 

But they could not find room for the 32 registers :(

 

About using memory mapped flash, then I checked when the chips first was supported and there the compiler didn't know about the memory mapped flash.

But you can just make pointers to the flash (remember that flash addr and "RAM" addr of the same are different) , and the compiler was using both X and Z as pointers.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Oops.   I know that I should not type directly from my a*se.

 

I should have looked at my PC first!

 

David.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

  that would really require __flash and C++ to be combined.

I thought __flash (and C++'s "objection" to it) specifically handled separate memory sections; ie it allows the compiler to generate LPM instructions when needed.

In the case of the zero-series MEGAs, this isn't needed - the flash and data address space are all unified.  Von Neuman architecture compilers (including gcc) generally just put all "const" data (inc literal strings) into ROM/Flash, or have an option to do so.  Perhaps whatever hack avr-gcc uses to put const data in RAM can simply be turned off?

 

Edit:  Oh wait - perhaps not.   Addresses in .text are zero-based, but when accessed as data, they appear at a different offset...

I'm pretty sure that something like:

  

const uint8_t PROGMEM foo[] = {1, 2, 3, 4};
 :
static inline uint8_t pgm_read_byte(uint8* p) {
    return *(p+MAPPED_PROGMEM_START);
}
// or
printf("%s", (char *)(foo)+MAPPED_PROGMEM_START);

will work fine.  (I guess I should try it, eh?)  But I'd like something "cleaner."

 

 

you shoot yourself in the foot if you produce a 40kB chip in 2017 and can never add a new family member above 56kB.

yes and no.  The AVRs that implement more than 64k (and most other 8 or 16bit CPUs that fundamentally work with 16bit addresses) get a bit kludgey with the various bank switching schemes and such.  It's one of my main criteria for selecting a 32bit CPU: "do I run into bank switching complexities."  Positioning the mega-0 chips to only compete with the small-memory segment might be a good thing.

 

 

Last Edited: Fri. Nov 23, 2018 - 01:10 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

It seems you need to use __attribute__((section(".rodata"))) on constant data to convince the compiler to use the flat memory model. But I need to do more experimenting...

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

westfw wrote:

you shoot yourself in the foot if you produce a 40kB chip in 2017 and can never add a new family member above 56kB.

yes and no.  The AVRs that implement more than 64k (and most other 8 or 16bit CPUs that fundamentally work with 16bit addresses) get a bit kludgey with the various bank switching schemes and such.  It's one of my main criteria for selecting a 32bit CPU: "do I run into bank switching complexities."  Positioning the mega-0 chips to only compete with the small-memory segment might be a good thing.

 

 

AVR architecture was revolutionary because allowed 128K program space naturally, with no banks, no special instructions to go beyond 64K. The flash is byte readable only in the first half, but this is still a full 64K (with LPM). Atmel exagerated a bit going beyond the 128K/64K limit (with those RAMPZ, ELPM, etc.) but in those days the 32bit computing was not that ubiquitous.

 

Nowadays an 8bit chip should stay in 64K address space. For example, an unified 64K with 56K flash, 6K ram, 1K eeprom and 1K io space looks very nice to me. Should you go beyond 64K? Use one of the myriad 32bit chips.

 

STM8 architecture is very nice in this respect. They've put the flash start address at 0x8000 (some have a bootloader at 0x6000) too high IMO, but otherwise it's a very clean chip if you stay into 32K flash. 

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

El Tangas wrote:
It seems you need to use __attribute__((section(".rodata")))
See prior posts from Georg-Johann about this very thing.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

david.prentice wrote:
Even now,  C compilers and libraries don't handle data above 64kB very well.    Program memory works with trampolines.   Most data memory is assumed to live below 64kB.    You have to tell the linker to do things otherwise.
... for AVR GCC.

IAR EWAVR has 24b pointers for program and/or data spaces (several memory models)

XMEGA DMA has 24b addressing though with max 64KB transactions.

AVR GCC has 24b types so could create functions to match existing 16b pointer functions though might be easier to use ASF3 Huge Memory (32b parameters)

 

IAR Embedded Workbench, AVR

http://gcc.gnu.org/wiki/avr-gcc#Types

http://asf.atmel.com/docs/latest/xmegaau/html/group__hugemem__group.html

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

IAR Information Center for Atmel AVR - Release notes

Release notes

for IAR Embedded Workbench for Atmel AVR version 7.10.3

...

 

 

Service Pack 7.10.3

...

  • Support has been added for the following devices:
    ATA5787, ATA5835, ATmega3208, ATmega3209, ATmega4808, and ATmega4809.

...

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

rammon wrote:
... and 1K io space looks very nice to me.
More than 1KB as CIP could be a source of IO for a possible megaAVR 1-series.

rammon wrote:
Should you go beyond 64K? Use one of the myriad 32bit chips.
Unless limited by temperature and/or leakage and/or GCR requirements.

Texas Instruments MSP430TM has a 20b flat memory space option in FSF MSP430 GCC.

One of AVR's advantages versus MSP430 is some AVR have an EBI; likewise with some PIC24 and dsPIC.

 


CIP - Core Independent Peripheral

What is a Core Independent Peripheral? - Developer Help

GCR - Galactic Cosmic Rays

https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gcc/MSP430-Options.html#MSP430-Options (-mlarge)

 

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Some things are not very logical.
- Why new 8/16/32er Tinys have the double amount of ADC's than brandnew Megas here?
- Mega0 Interrupt-Table looks very messy.
- The labeling on the housings is still Atmel...

Last Edited: Fri. Nov 23, 2018 - 07:31 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Von Neuman architecture compilers (including gcc) generally just put all "const" data (inc literal strings) into ROM/Flash, or have an option to do so.  Perhaps whatever hack avr-gcc uses to put const data in RAM can simply be turned off?

 

Edit:  Oh wait - perhaps not.   Addresses in .text are zero-based, but when accessed as data, they appear at a different offset...

 

Followup.  Apparently I was worried about an issues that has been solved for a long time.

Avr-gcc already has an "architecture" defined for AVRs like the ATmega4809

"const" data, including literal strings, goes off into the .rodata section, with symbols appropriately offset and accessible via "ld" instructions.

If you're using one of the chips with a unified 64k address space, you shouldn't need PROGMEM or __flash...

 

-mmcu=atxmega3

avrxmega3

“XMEGA” devices with up to 64 KiB of combined program memory and RAM, and with program memory visible in the RAM address space.

This does indeed appear to do the desirable thing with data that is merely "const" (including literal strings), and subsequent tools also behave as desired.

 

#include <avr/io.h>
#include <avr/pgmspace.h>
#include <stdio.h>

const char s[] = "this is a const string";
const char PROGMEM p[] = "this is a progmem string";
const char __attribute__((section(".text"))) t[] = "this is a .text string";
const char __flash f[] = "this is a __flash string";

int main() {
    printf("%s\n", s);
    printf("%s\n", p);
    printf("%s\n", t);
    printf("this is a constant literal string.");
}

Compile with "avr-gcc -mmcu=atmega4809 -g -Os foo.c", copy to .hex with "avr-objcopy -O ihex -R .eeprom a.out a.hex"

 

(edited) "avr-nm -S -n" output:

000000a0 T __trampolines_end
000000a0 T __trampolines_start
  :
000000a0 00000019 T f          *** __flash string ***
000000b9 00000019 T p          *** progmem string ***
000000d2 T __ctors_end
000000d2 W __init
000000de 00000010 T __do_clear_bss
000000f6 T __bad_interrupt
000000f6 W __vector_1
  :
000000f6 W __vector_9
000000fa 00000017 T t
00000112 0000002e T main
  :
00000752 t __stop_program
00000754 T _etext
  :
00004000 A __RODATA_PM_OFFSET__
00004754 00000017 R s       *** const string *** (note == _etext!) ***

 

Edited Output from "avr-objdump -s a.out":

Contents of section .text:
   :
 0090 0c947b00 0c947b00 0c947b00 0c947b00  ..{...{...{...{.
 00a0 74686973 20697320 61205f5f 666c6173  this is a __flas
 00b0 68207374 72696e67 00746869 73206973  h string.this is
 00c0 20612070 726f676d 656d2073 7472696e   a progmem strin
 00d0 67001124 1fbecfef cdbfdfe3 debf28e2  g..$..........(.
 00e0 a0e0b8e2 01c01d92 a630b207 e1f70e94  .........0......
 00f0 89000c94 a8030c94 00007468 69732069  ..........this i
 0100 73206120 2e746578 74207374 72696e67  s a .text string
 0110 000084e5 97e40e94 b60089eb 90e00e94  ................
   :

Contents of section .rodata:
 4754 74686973 20697320 6120636f 6e737420  this is a const 
 4764 73747269 6e670074 68697320 69732061  string.this is a
 4774 20636f6e 7374616e 74206c69 74657261   constant litera
 4784 6c207374 72696e67 2e00               l string..        *** Where we want it! ***

 

edited output from "avr-objdump -s a.hex"

Contents of section .sec1:
 0000 0c946900 0c947b00 0c947b00 0c947b00  ..i...{...{...{.
   :
 00a0 74686973 20697320 61205f5f 666c6173  this is a __flas
 00b0 68207374 72696e67 00746869 73206973  h string.this is
 00c0 20612070 726f676d 656d2073 7472696e   a progmem strin
 00d0 67001124 1fbecfef cdbfdfe3 debf28e2  g..$..........(.
 00e0 a0e0b8e2 01c01d92 a630b207 e1f70e94  .........0......
 00f0 89000c94 a8030c94 00007468 69732069  ..........this i
 0100 73206120 2e746578 74207374 72696e67  s a .text string
   :
 0740 aa81b981 ce0fd11d cdbfdebf ed010895  ................
 0750 f894ffcf 74686973 20697320 6120636f  ....this is a co   *** Where we want
 0760 6e737420 73747269 6e670074 68697320  nst string.this    ***  this in flash
 0770 69732061 20636f6e 7374616e 74206c69  is a constant li
 0780 74657261 6c207374 72696e67 2e00      teral string..  

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Service Pack 7.10.3

...

  • Support has been added for the following devices:
    ATA5787, ATA5835, ATmega3208, ATmega3209, ATmega4808, and ATmega4809.

...

That is not the question here.

That could be true with just with adding correct memory and IO model. (the chips still have LPM)

 

The question is if the compiler use that the flash also is memory mapped. So instead of only Z as a pointer also X and Y can be used.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hey, just a theoretical question - in older AVRs Flash, EEPROM and RAM were separated but now they are "together" in one address space. So is it possible to run program from RAM or EEPROM?

extronic.pl

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

extronic wrote:

...but now they are "together" in one address space. So is it possible to run program from RAM or EEPROM?

 

They are not together, they are still two separate entities. All that has changed is that the code space is now visible within a region of the data space memory map. See figure 5-1 in the datasheet. Note that the inverse, with data visible within the code space, does not happen.

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

one could hope that there would come a new version of AT94K chips, they are so far the only AVR's that run code from RAM

 

why would you run code from RAM in most cases a simple interpreter would do a fine job (about the speed of C code).

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

You're right. Thanks for your explanation.

extronic.pl

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

No. Take a look at the memory map for the Mega4809 for example, the program memory is placed at the top of the memory space. Since the program counter can only address the code space, it can't see the other memory types that are at lower addresses.