mega88 RC oscillator wrong by a factor of 4?

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Has anyone ever seen a mega88 come up with the RC oscillator slow by a factor of 4? At least 99% of the time the product powers up correctly and all is good. But every once in a while, it powers up with dramatically incorrect osc frequency. I am setting the prescaler each time, and the fuse bits have the internal RC selected with 65ms delay on power up.
The factor of 4 makes me think it is the prescaler, but why would it be different every once in a while?
The slow clock causes the watchdog to trip and then everything works correctly (but a motor has moved during the startup and makes the position wrong).

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Irratic behavior can also be observed if you do not have adequate by-pass caps on board, and if your motor is trashing your power supply line.

JC

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Well can't you write the CLKPR regiter to a "log" in EEPROM on each startup and then, when it misbehaves, dump the log to see if it had an unexpected value. The only values it SHOULD have at startup are /1 or /8 (if the CLKDIV8 fuse is enabled)

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How are you determining that it is the clock that is slow, and by a factor of 4? Do you have a timer oscillating a pin, or set up to monitor clock-out pin?

Or it it merely the fact that the watchdog times out?

Is the situation only at power-up? But external reset (easy to test) as well?

Does it occur with quick power cycles as well as dead-dead ones?

I'm getting down to that there are a number of things that may affect timing, especially from a cold start. Dipping Vcc when peripherals turn on and slow LCD time till "ready" come to mind.

Lee

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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I did have a scope watching a pin that toggled.
turns out there was a subtle typo on the line where the CLKPR was being written.
it apparently was 0 most of the time, but occasionally the register would be a random (uninitialized)
it is always simple and obvious once you find it.

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Do you have in a configuration register internal clk divider set?