M328P vs Mega0/1 ADC inputs

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Not sure which forum this should go to, so trying here.

 

The M328P has digital disconnects on ADC inputs since logic inputs can cause a lot of power (in relative terms, I guess) to be drawn from Vcc when inputs are held around Vcc/2.

 

I cannot tell if something similar is used in the Mega0/1 devices or if there is an automatic disconnect built in.

 

Can someone point to any details on this beyond the lack of details? Or, am I just missing the reference in the documentation?

 

Thanks

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

Last Edited: Mon. Oct 21, 2019 - 06:48 PM
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>I cannot tell if something similar is used in the Mega0/1 devices or if there is an automatic disconnect built in.

 

The reset state is the pin will be an input, just as the avr's before, but there is an option to disable a pin's input when not needed. The PORT chapter in the datasheet shows a nice diagram. When the pin input is disabled, the input buffer is 'disconnected' and pulled low.

 

For low power, one can disable all unused pin inputs. Although I do not have any need yet, I have code in place that simply sets all pins to analog input (my term for input disable) in the startup code. Imagine if they decided to make that the default pin state- they would have to answer the same question for years and years- 'why can't I get a pin input to work', and Cliff would have to add another FAQ to his signature.

 

edit-

 

Comparing the 328 to a mega0-

 

the 328 uses alternate function override signals to disable the input buffer when an adc pin is selected in adc mux, so it appears it is only the selected adc channel that has its input disabled and there are no decisions to make as its all done for you

also, when in sleep mode other than idle, it appears the inputs are also disconnected unless an override signal is present (pin as interrupt)

 

the mega0/1 leaves it all up to you- when using adc you should disable the input, but its up to you to do it

you have more control over when inputs are disabled, and the only downside appears to be you are in charge of doing it

Last Edited: Mon. Oct 21, 2019 - 07:58 PM
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Thanks

 

Jim

 

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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ka7ehk wrote:
The M328P has digital disconnects on ADC inputs since logic inputs can cause a lot of power (in relative terms, I guess) to be drawn from Vcc when inputs are held around Vcc/2.

This is a concern I've had for long time but I've never seen anything in a datasheet that addresses it.  I've never seen a statement like "be sure to disable the logic input function as soon as possible during initialization on analog input pins that are biased to Vcc/2 to avoid damage to the device".  Nor have I seen any current draw specs for the aforementioned situation.  I'm mostly concerned when powering up a new board and the micro hasn't yet been programmed; the chip could be this state for a considerable length of time.  Is this something to be concerned about or is the assumed (temporary until initialization is complete) increased current consumption not enough to worry about?

Letting the smoke out since 1978

 

 

 

 

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As far as I have been able to read, its not a matter of damage but, instead, a matter of power consumption. I think that it was added as part of the PicoPower transition from M328 to M328P as a way to reduce power. 

 

I believe that the issue has to do with the gate input structure, one N-channel and one P-channel mosfet. When the gate input is biased near Vcc/2, both are partially on. In normal operation with logic inputs, only one or the other is on. It is similar to the "shoot-through" phenomenon with H-bridges, but with very small geometry FETs. Since the channels are small, the shoot-through current is nothing like it is with power FETs. 

 

I have never read any recommendations for use beyond what is in the Mega328P spec sheet under DIDRO register in the ADC section:

• Bit 5:0 – ADC5D...ADC0D: ADC5...0 Digital Input Disable

When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis- abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an analog signal is applied to the ADC5...0 pin and the digital input from this pin is not needed, this bit should be written logic one to reduce power consumption in the digital input buffer.

 

Note that ADC pins ADC7 and ADC6 do not have digital input buffers, and therefore do not require Digital Input Disable bits.

 And, in section 10.10 about reduction of power consumption:

 

10.10.6 Port Pins

When entering a sleep mode, all port pins should be configured to use minimum power. The most important is then to ensure that no pins drive resistive loads. In sleep modes where both the I/O clock (clkI/O) and the ADC clock (clkADC) are stopped, the input buffers of the device will be disabled. This ensures that no power is consumed by the input logic when not needed. In some cases, the input logic is needed for detecting wake-up conditions, and it will then be enabled. Refer to the section ”Digital Input Enable and Sleep Modes” on page 81 for details on which pins are enabled. If the input buffer is enabled and the input signal is left floating or have an analog signal level close to VCC/2, the input buffer will use excessive power.

 

For analog input pins, the digital input buffer should be disabled at all times. An analog signal level close to VCC/2 on an input pin can cause significant current even in active mode. Digital input buffers can be disabled by writing to the Digital Input Disable Registers (DIDR1 and DIDR0). Refer to ”DIDR1 – Digital Input Disable Register 1” on page 251 and ”DIDR0 – Digital Input Disable Register 0” on page 268 for details.

Jim 

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

Last Edited: Tue. Oct 22, 2019 - 01:11 AM
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Thanks for the detailed reply.  That explains why I never ran across any mention of this issue/phenomenon in the datasheets for the various devices I've used.  I've yet to work on a power sensitive application so I never looked at the sections in the datasheet dealing with low power considerations!  I guess I deserve a RTFM! laugh

Letting the smoke out since 1978