Low power sleep modes on SAMD21, SAMD51...

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I am pretty confused about the interactions of the various pieces involved in low-power modes of the SAMD processors.

There's the WFI instruction of the ARM.

There's the SCR (System Control Register) (also part of the ARM)

There's the power manager, the clock manager, the interrupt stuff and the reset controller...

For SAMD51, there are SLEEPMODE values listed as "reserved" in the datasheet, but defined in the .h file.  Including the default value.

I have deep uncertainty about how peripherals behave when you turn off their clocks, and whether they'll resume correctly just by turning the clock back on.


Is there an app note or tutorial that explains in more detail how everything fits together?


What I think so far:

  1. WFI is "Wait for Interrupt", so if you want to wait for a WDC or RTC interrupt, you have to ensure that no other interrupt comes along first.
  2. You could do that by manually disabling interrupts or each active peripheral (because WFI doesn't care about "levels" set?), or by turning off the peripheral clocks.
  3. You can turn of the clocks manually, or by using a sleep mode that disables the peripheral clocks.
  4. "Some" things, once you turn off the clocks, there is no way out by a reset (NVM controller of SAMD21?)
  5. Only turning off the CPU clock lets you recover pretty cleanly, but is unlikely to yield impressive power consumption levels. :-(  Also, it'll require manually disabling the peripheral interrupts that you don't want to cause wakes.