JTAG resets even if JTAG is disabled!

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Hi all,

I use ATmega169PV - QFN, with 8MHz external crystal. The micro is intended to operate relays, and I got into problem of spurious reset of AVR when a relay is turned on (relay controls a 40W incandescent).

The relays are in a separate PCB, AVR is in a separate PCB which sits on top of relay PCB.

Natural doubt was AVR is getting reset because of low-going pulse(noise) in reset line due to noise by relay contact operation.

I tried decreasing the pull-up resistor value, increase the cap upto 1u - none worked. I even shorted the reset line directly with Vcc - no success.

Then I separated both the boards by a flat ribbon connector, and kept both the boards about 6 inches apart and repeated the reset-RC tweaking - still no success.

Even wrapped the AVR PCB with a conducting foil, grounded the foil at two ends diagonally (indeed forming a ground plane between the relays and AVR) - no success.

Then wrote a test code which would toggle the relay every 600ms, and AVR at startup would turn on specific LEDs for Watchdog reset, Brown out, Power on reset, External reset or JTAG reset (program would check for all conditions in if and else-if, specifically omitted any else condition)

When I turn on the setup for the first time (turn off-on the AC mains itself), then I get indication that its by Power on Reset (expected). However, as the relay toggles, after some 10 to 20 on-off operation, I get only JTAG reset as the indication (indeed, AVR gets resetted nevertheless).

The JTAG-reset pattern looks curious - for every 4th turn-on of relay, I get the reset. I mean (on-off) (on-off) (on-off) (on - AVR resets indicating JTAG reset) - like this the pattern continuous for about 6 to 8 cycles, and then it becomes random, and after sometime this pattern repeats.

Intriguing, since JTAGEN fuse is disabled, JTD bit is set in proper timing in the code, TMS, TDI and TDO pins are shorted to ground, TCK pin is being used as an AD channel.

Datasheet reveals a single bit 'Reset register' for JTAG puposes and a high on this resister would cause a system reset - however as the TDI pin itself is shorted to ground, I dont expect the 'reset register' can output a logic high at Q.

Any thoughts please?

Thanks,
Vignesh

Cheers,
Vignesh

If everything seems to be coming onto your way, then you are probably driving on a wrong lane..

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Regardless of what resets the processor, noise is obviously getting into the chip.

So you will need to look at stopping the electrical noise.

Are you relays coils fitted with a reverse biased diode?

Do you have snubber network on your relay contacts?

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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Hi JS,

Thanks for you reply.

js wrote:
Are you relays coils fitted with a reverse biased diode?

Yes, indeed.
js wrote:
Do you have snubber network on your relay contacts?

No, no snubber network across the contacts.

Well my questions are

1. Why JTAG reset?
2. Why JTAG reset even if JTAG is disabled?
3. Why is a periodic reset pattern?

Cheers,
Vignesh

If everything seems to be coming onto your way, then you are probably driving on a wrong lane..

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Don't really know the answers to you questions but somehow the noise must be throwing the processor off course and executing an AVR_RESET.

Quote:
• Bit 4 – JTRF: JTAG Reset Flag
This bit is set if a reset is being caused by a logic one in the JTAG Reset Register
selected by the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset, or
by writing a logic zero to the flag.
Even if the reset would not occur it would be a cause for concern as the noise may cause other problems in the field. So I would still try and address the noise problem.

Take the load off the relays and run you tests. If the problem goes away then snubbing the relay contacts may solve the problem. If it is still present then you may need to look at how the relays are being driven.

Can you activate the relays one at the time? Perhaps you can localise just a problematic unit.

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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js wrote:
Can you activate the relays one at the time? Perhaps you can localise just a problematic unit.
Yes, doing the same.
js wrote:
Take the load off the relays and run you tests.
If the load is not connected, then there is no spurious reset, which means coil driving is not the noise source. Snubber is an answer, however, it is difficult to accomodate. Another scenario is, one specific relay is causing the trouble, rest operate without trouble.

Cheers,
Vignesh

If everything seems to be coming onto your way, then you are probably driving on a wrong lane..

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Solved!

Apparently it was a noise issue, in which the noise was coupled to AVR through GPIOs - through the clamping diodes back to Vcc. When Vcc went haywire, periodic JTAG reset was one of the crazy ways of behaving!

When the GPIOs were bypassed, situation drastically improved.

So folks - consider a fast reacting suppressor at Vcc and low-pass filtered GPIOs for AVR, in addition with proper decoupling measures, especially when handling relays.

Cheers,
Vignesh

If everything seems to be coming onto your way, then you are probably driving on a wrong lane..