AVR Freaks

I got at Atmel START to see what the current i2c_master.c is.
I didn't understand the intent of this coder, but NOTE looks like an excuse. It feels like a very unfriendly thing to me.

void I2C_0_master_isr(void)
{
    TWI0.MSTATUS |= (TWI_RIF_bm | TWI_WIF_bm);

    // NOTE: We are ignoring the Write Collision flag.

    // Address phase received NACK from slave, override next state
    if (I2C_0_status.addressNACKCheck && (TWI0.MSTATUS & TWI_RXACK_bm)) {
        I2C_0_status.state = I2C_ADDRESS_NACK; // State Override
    }

    // Bus arbitration lost to another master, override next state
    if (TWI0.MSTATUS & TWI_ARBLOST_bm) {
        I2C_0_status.state = I2C_BUS_COLLISION; // State Override
    }

    // Bus error, override next state
    if (TWI0.MSTATUS & TWI_BUSERR_bm) {
        I2C_0_status.state = I2C_BUS_ERROR; // State Override
    }

    I2C_0_status.state = I2C_0_fsmStateTable[I2C_0_status.state]();
}

Here is the code I actually use:
This is a reduction of the code that old AtmelSTART gave me
I do not recommend it to others because it is my own, but please refer to it as a sample that is actually working.

/* I2C Driver for AVR0/1 */
#include "i2c.h"
#include <avr/interrupt.h>

////////////////////////////////////////////////////////////////
// variable
////////////////////////////////////////////////////////////////
static volatile bool ready = true;
static volatile uint8_t result;         // Communication result
static volatile uint8_t *p_now, *p_end; // data pointer

////////////////////////////////////////////////////////////////
// Check ready
////////////////////////////////////////////////////////////////
bool i2c_isready(void){
    return ready;
}

////////////////////////////////////////////////////////////////
// Check result
////////////////////////////////////////////////////////////////
uint8_t i2c_isresult(void){
    return result;
}

////////////////////////////////////////////////////////////////
// I2C Communication start
//  i2c_adr = device_adr + (R/W)bit
////////////////////////////////////////////////////////////////
bool i2c_trx(uint8_t i2c_adr, void* buf_adr, uint8_t length){
    if (!ready) return false;   ready = false;
    result = TWIM_RESULT_UNKNOWN;
    p_now = buf_adr;
    p_end = buf_adr + length;
    TWI0.MADDR = i2c_adr;
    return true;
}

////////////////////////////////////////////////////////////////
// I2C Interrupt
////////////////////////////////////////////////////////////////
ISR(TWI0_TWIM_vect){
    uint8_t currentStatus = TWI0.MSTATUS;
    uint8_t *pn = (uint8_t*)p_now;

    // If arbitration lost
    if (currentStatus & TWI_ARBLOST_bm) {
        TWI0.MSTATUS |= TWI_ARBLOST_bm | TWI_BUSERR_bm | TWI_WIF_bm;
        result = TWIM_RESULT_ARBITRATION_LOST;
        ready = true;
    }

    // If  bus error
    if (currentStatus & TWI_BUSERR_bm) {
        TWI0.MSTATUS |= TWI_ARBLOST_bm | TWI_BUSERR_bm | TWI_WIF_bm;
        result = TWIM_RESULT_BUS_ERROR;
        ready = true;
    }

    // If master write
    else if (currentStatus & TWI_WIF_bm) {
        // Is NAK
        if (currentStatus & TWI_RXACK_bm) {
            TWI0.MCTRLB = TWI_MCMD_STOP_gc;
            result = TWIM_RESULT_NACK_RECEIVED;
            ready = true;
        }

        // Send next
        else if (pn < p_end) {
            TWI0.MDATA = *pn;
            p_now = ++pn;
        }

        // Send completely
        else {
            TWI0.MCTRLB = TWI_MCMD_STOP_gc;
            result = TWIM_RESULT_OK;
            ready = true;
        }
    }

    // If master read
    else if (currentStatus & TWI_RIF_bm) {
        // Is NAK
        if (currentStatus & TWI_RXACK_bm) {
            TWI0.MCTRLB = TWI_MCMD_STOP_gc;
            result = TWIM_RESULT_NACK_RECEIVED;
            ready = true;
        }

        // Read data
        *pn = TWI0.MDATA;
        p_now = ++pn;

        // Receive next
        if (pn < p_end) {
            TWI0.MCTRLB = TWI_MCMD_RECVTRANS_gc;
        }

        // Receive completely
        else {
            TWI0.MCTRLB =   TWI_ACKACT_bm | TWI_MCMD_STOP_gc;
            result = TWIM_RESULT_OK;
            ready = true;
        }
    }

    /* If unexpected state */
    else {
        result = TWIM_RESULT_FAIL;
        ready = true;
    }
}