interrupt before sei

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I have a question about sei. What happens if an external interrupt occurs before sei has been called?

In my program I do the following:
1 - Enable the interrupt generation in a device connected to my mega16
2 - Enable external INT0 in GIFR (clearing flag), MCUCR and GICR
3 - Start some activity that might trigger the interrupt
4 - call sei and sleep
5 - wake up, call cli immediately

My program works all the times I have tested it. But I still want to make sure that the INT hasn't arrived by the time I call sei. Do AVRs bypass the sleep if the interrupt arrives before sei? Or should I test the INT0 line before calling sei? (Wouldn't like that, as the interrupt might still arrive before sei is executed.)

Any suggestions?

Greetings,
Børge

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OK
Your question is a little bit difficult to read.
First:
sei isn't called
it is not a subroutine
it is a command (SEt Interrupf enable flag)

Second:
the AVR won't bypass the sleep command, it will execute the ISR first

Sample code:
.org $000
jmp Start
.org $002
jmp INT0handler
.org $030
Start:
....
CLI
;set the INT0 bit in GICR
;set the Interrupt Sense Control 0 Bits in MCUCR
;do some stuff to trigger the INTF0 bit in GIFR
...
sei
sleep
...
forever:
rjmp forever

INT0handler:
;do some other stuff
reti

Following situation:
The INT0 bit in GICR and the INTF0 bit in GIFR are set (are "1")

the programm reach the SEI command
now the I-Flag in SREG will be set

the interupt handling mechanism starts
- the I-Flag in SREG will be cleared automaticly and all interrupts
are disabled
- the current PC will be pushed on the stack
- the PC is set to $002 "External Interrupt Request 0"
- the hardware clears the corresponding Interrupt Flag (the INTF0 bit in GIFR)

then this sample code jumps to the INT0handler
and "do some other stuff"

the RETI reactivate the interrups by setting the I-Flag in SREG
and return the PC to the command after the SEI

Now the AVR will reach the sleep command

I hope to have helped

cu
Hauke

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Sorry, but this is not quite correct.

The AVR is guaranteed to execute one instruction after becoming enabled (via
SEI or RETI). So in the sequence

   sei
   sleep

any pending interrupt will return to the instruction after the sleep.

So the OP's sequence should work assuming that interrupts are disabled all
the time except during the sleep. (Most main programs don't run disabled all
the time, which is where the race conditions creep in.)

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mckenney wrote:
Sorry, but this is not quite correct.

The AVR is guaranteed to execute one instruction after becoming enabled (via
SEI or RETI). So in the sequence

   sei
   sleep

any pending interrupt will return to the instruction after the sleep.

So the OP's sequence should work assuming that interrupts are disabled all
the time except during the sleep. (Most main programs don't run disabled all
the time, which is where the race conditions creep in.)

That's what I hoped. Because if the chip generating the interrupt has an error, I might get the interrupt before having executed the sei command. But after configuring the interrupt in GICR and MCUCR. And in that case I want to skip to the instruction after sleep. Otherwise, I risk sleeping forever.

Børge