Interfacing LV-TTL to 50Ohm Load

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Hi, i'm using a 3.3V AVR that's generating 8 clock signal. Now i have to feed that signals to 50Ohm loads with 5V amplitude. How can i do so?

My first try was to use some 3 gates of a 74ABT245 parallel. But the output voltage level is about 4V.

Later I may exchange the AVR with an FPGA to have output frequencies up to 80MHz...

Best Regards,
Tobias

Hava a look at my web page -> http://www.tobiscorner.at.tf

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5 volts to 50 ohms is 100mA, which is quite a lot. You just need more buffers in parallel or a different kind of buffer. But taking 33mA out of a single buffer just drops the output voltage that much that you only get 4 volts.

How about some discrete components like FETs or BJTs to buffer your signal out to the load? Or a video op-amp?

By the way, if you have a 50 ohm load, do you need a 50 ohm output impedance too (i.e. do you have 50 ohm coaxial cable between your devices)? Because then 5 volts into 50 ohm load means 10 volts of source voltage if you must have 50 ohm source impedance.

- Jani

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Adding more buffers didn't increase the voltage any more.
50 ohm output impedance is not really needed for this application and the highest voltage i have on the board is 5V (there is 1.8V, 3.3V and 5V available). So any utput signal with 4.5V at 50 ohms will be good enough.

I already tried some FET circuits but failed because of my poor FET knowledge. So any input from your side will be helpfull :-)

I did not consider video opamps because of this are digital signals and sharp edges are important to me. And 8 high-speed video opamps with R2R and single supply are not the cheapest..

Hava a look at my web page -> http://www.tobiscorner.at.tf

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Take a look at the high current buffer and/or analog
switch components from Pericom. Some of these
little guys are quite stout. TI also has similar
versions of some of them.

Tom Pappano
Tulsa, Oklahoma

Tom Pappano
Tulsa, Oklahoma

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I don't know what frequencies you are working with at this point, but I'd take a look at some FETs like these:
http://www.fairchildsemi.com/ds/...
I'm using them to interface some 3V FPGAs to high voltage (12V) CMOS logic at frequencies under 10MHz. They work very well for this and can handle plenty of current, and are VERY small.

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What would such a FET circuit look like?

Hava a look at my web page -> http://www.tobiscorner.at.tf

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Hi,

maybe you can use an RS422/RS485 driver chip.

Quote:
Adding more buffers didn't increase the voltage any more.

Usually it is not necessary to get more than 4V, because with 5V systems everything >= 3.5V is a valid logic high.
And especially with the "T" in ABT245 everything >2.0V is a valid logic high level.
To avoid ground current and invreasing noise immunity i recommend to use differential signals.

So my questions are:
* What is your receiver? How are the inputlevels and -impedances specified?
* What distance do you want to transmit your signals?
* Are the 8 clocks same frequency/phaseshift?
* can you tell us more about your application?

Klaus
********************************
Look at: www.megausb.de (German)
********************************

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Not knowing the details of your application, here
is a basic example:

There are (2) FETs in the package, which are completely independent, so you can use them to drive separate signals or use them together.

For interfacing from 3V to 12V, for example:
Connect the source (S)of one FET to your logic ground.

Connect the drain (D) of the same FET to the signal line which connects to your higher voltage interface. Use a pullup resistor to tie this node to your higher
voltage power source (5V) or (12V) or whatever - this will work up to 25V.

Connect the gate (G) of the same FET to your AVR or FPGA IO pin - it can easily be driven well by a 3V logic signal.

What this will do is invert your logic/data stream - turning on your 3V IO output turns on the FET, and
drops the voltage on the signal line from 5V down very close to 0V. You can use a fairly stiff
(low value) pullup resistor on that FET, it can handle alot of current. If you are driving a signal
through a cable and going off-board, this might be a viable option for you. You can do the same thing with the other FET, or use it another way. These
FETs are also fairly tough, so interfacing to the outside world (ESD) isn't bad for them.

If you are going to be using higher speed (>10MHz)
clocks and are concerned about clock phase/jitter
among them, I'd also recommend looking at some of
the ICs from Pericom, made specifically for clock driving.

Hope that this helps.

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Thanks for your answers.

The problem with your inverting approach is that it is inverting. I tried a N-Channel - P-Channel combination:
N-Channel:
Gate: direct to AVR / FPGA
Source: GND
Drain: connected to Gate of P-Channel and pulled up to 5V

P-Channel:
Gate: see above
Source: 5V
Drain: Output

I once used this configuration with as a power control for an AVR circuit, where there AVR was able to turn itself of. For testing with higher speeds i used a 80MHz Oscillator (Output TTL / CMOS compatible) but the circuit did not work. The output stayed at high with some 80MHz ripple on it.

The box i want to interface is a pocket cell driver that states in it's specifications that the input level has to be 5V at 50 ohm, single ended (i think). Some testing with the 3 APT245 gates today resulted in about 3.5V levels and the box sometimes didn't detect the high level.

Maybe i can open one driver tomorrow and see if the input signals have to be single ended.

Hava a look at my web page -> http://www.tobiscorner.at.tf

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I see. These particular FETs do not respond well to
fast, 80 MHz signals. And, depending on the pullup termination used, that will also limit the upper limit of switching speeds. I will see if I find some others
which may be suitable, and if I do, will post another reply.