Hi all, I'm using the SAMG53 xplained with Atmel Studio 6 and ASF 3.19.
I have written the following code and am sure that it is doing what it is supposed to in terms of reading from my audio codec when the RXRDY flag is set, and placing the values from the RHR in the DMA buffer I have set up. Codec generates all clocks, works as expected. Definitely sending data into the MCU, and if I pause/stop over and over, it places a new value in the buffer, in the appropriate location.
The DMA counter register does not decrement in debug mode, which is expected. However writing a one to any bit of the SSR as stated on page 701 of the datasheet, doesn't seem to solve this.
I'm hoping someone can 1)verify this code as proper, and 2) make a suggestion as to how I might be able to let the program run without having to write to the SSR, or how to write properly to the SSR (could be a polled loop for right now), in order to see the data being captured.
Although I have the xplained board, I also have the Atmel ICE. Is there a way I can run the ICE to set conditional breakpoints (like "hey there, your dma buffer is full, check it out!") so that I can then examine the contents in the ASF watch window, or do I need to get into some other form of trace?
Suggestions welcome and appreciated.
/***** DATA STRUCTURES *****/
struct i2s_config i2s1_config; //Struct for configuration
struct i2s_dev_inst i2s1_dev_inst; //Struct for device instance
/***** CONFIGURE i2s ******/
i2s1_config.data_format = I2S_DATE_16BIT; //Bit mask for data format (16 bit)
//i2s1_config.fs_ratio = I2S_FS_RATE_1024; //Master clock fs*256
i2s1_config.tx_channels = 0; //Transmit off
i2s1_config.rx_channels = 1; //Receive mono
i2s1_config.rx_dma = I2S_ONE_DMA_CHANNEL_FOR_ONE_CHANNEL; //One dma per audio channel
i2s1_config.loopback = false; //No loopback
i2s1_config.master_mode = false; //Master Mode
i2s1_config.master_clock_enable = false; //Generate Master Clock
i2s1_config.slot_length_24 = false; //Slot length set to 16/32 bits (both words?)
i2s_init(&i2s1_dev_inst, I2SC1, &i2s1_config);
/***** ENABLE DMA TRANSFER FROM i2s1 *****/
/***** PDC REGISTERS FOR I2S *****/
/* Get pointer to I2S PDC register base */
g_p_i2s1_pdc = i2s_get_pdc_base(&i2s1_dev_inst);
/* Initialize PDC data packet for transfer */
g_p_i2s1_pdc_packet.ul_addr = &q15dmabuffer;
g_p_i2s1_pdc_packet.ul_size = 1024;
g_p_i2s1_pdc->PERIPH_PTCR |= PERIPH_PTCR_RXCBEN; //Turn on Circular Buffer
/* Configure PDC for data receive */
pdc_rx_init(g_p_i2s1_pdc, &g_p_i2s1_pdc_packet, &g_p_i2s1_pdc_packet);
/* Enable PDC transfers */
pdc_enable_transfer(g_p_i2s1_pdc, PERIPH_PTCR_RXTEN | PERIPH_PTCR_TXTDIS);