I fail at programming an attiny2313a. Why?

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I've designed a board (in KiCAD) that contains the attiny2313a mcu (two of them, actually) that plugs onto an OrangePiZero microcomputer. It runs on 3.3V and has a capacitor between VCC and GND. I've connected reset, miso, mosi and sck to Gpio pins (and not to anything else). I have regularly used avrdude to do serial programming of Arduino atmega devices this way, so I know that works. However, when I set it up to program this attiny, the device does not respond at all.

 

I have electrically tested the connections; all the pins are properly connected to the correct gpio pin, and none of them are connected to each other. I've also manually operated the Gpio pins on the microcomputer and they all work as expected.

 

My ideas for what the problem can be are:

  1. reset pin is not active (set to dW or regular digital pin in fuse bits). This seems extremely unlikely, given that I soldered it on myself, so it shouldn't be possible that it's not in factory default settings.
  2. the clock source (set by the fuse bits) is not an internal oscillator: my board uses the internal RC oscillator, so no crystal is connected. This is as unlikely as the previous option, for the same reason.
  3. avrdude is buggy when it comes to this mcu. I find this very hard to believe.
  4. I broke both the devices when soldering them to the board. I suppose this is possible, but I find it unlikely especially because both of them are broken. (Then again, if I'm doing it wrong, I would do it wrong twice.)
  5. my board design is bad and there is too much interference between the traces, or too much resistance in the traces, or something similar.
  6. something else that I did not think of.

 

What am I likely missing?

 

For those interested, I attached the board schematic.

 

My avrdude.conf is:

 

programmer
  id    = "boiler";
  desc  = "Program the attiny2313 pretend-boiler";
  type  = "linuxgpio";
  reset = 2;
  sck   = 16;
  mosi  = 13;
  miso  = 14;
;

programmer
  id    = "thermostat";
  desc  = "Program the attiny2313 pretend-thermostat";
  type  = "linuxgpio";
  reset = 3;
  sck   = 7;
  mosi  = 19;
  miso  = 18;
;

 

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Last Edited: Wed. Sep 28, 2022 - 08:14 AM
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Can you explain what is this, and how you expect to work, please.

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Wow, where to begin!? 
A schematic tells a story, inputs on the left, outputs on the right, so it reads left to right, and it’s obvious what it does in the middle. Yours is just a bunch of parts scattered about!  Go back and DRAW it again, showing how each part connects to the others and tells the story.

 

Decoupling caps are NOT polarized, normally 100nf,  and shown connected to the supply line of the chip it’s decoupling, not out in space somewhere.

 

take the time needed to tell the story, and then you will find others willing to help you.

 

 

 

FF = PI > S.E.T

 

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This is just plain AWFUL...why can't it be drawn in some sensible way??? 

What if this was a circuit of 10 times the complexity with 200 components?  Just throwing things all over the place shows nothing.

How do you expect to spot an error if you can't see what is connected to what? Are you supposed to assemble the schematic in your head? 

The 2N7000 is a mealy little transistor, hardly anything for "high current"

Why on Earth is there a pot on the FET gate? 

 

Get familiar with a gnd symbol and use it--another example of trouble.

 

Why would drawing a simple pot be done in such a contorted manner?

As we move from left to right what is the input...looks like gnd? , INB? (also, why is the label sideways).

You want the output to be line--why? where does it go?  Over to Q1?  

It is important to pay attention to what is being done, not throw things randomly around.

Your next round has a lot of room for improvement!

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Thu. Sep 15, 2022 - 05:38 PM
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Thanks for the responses. Even though my question was not about any of this, I'll answer your questions and remarks below.

 

The reason I added the schematic was to show that there is nothing else connected to the lines that are used for programming the AVR. So while I'm sure the design can be improved a lot, that is not what isn't working for me.

 

So I hope someone has an idea of what can be the problem.

 

As for your feedback on the schematic, you have of course noticed that I haven't had training in this. I know how the components work, but I'm not familiar with conventions for how to draw a schematic.

 

ki0bk wrote:

A schematic tells a story, inputs on the left, outputs on the right, so it reads left to right, and it’s obvious what it does in the middle. Yours is just a bunch of parts scattered about!  Go back and DRAW it again, showing how each part connects to the others and tells the story.

...

take the time needed to tell the story, and then you will find others willing to help you.

I'm not asking for help on this part, so I hope you, or anyone else, is willing to help me anyway. However, I appreciate your comment and will try to follow those conventions in the future.

 

(And in case you want to know: this is two different systems on one board, one that pretends to be a thermostat that talks the OpenTherm+ protocol to a real boiler and one that pretends to be a boiler that talks to a real thermostat.)

 

ki0bk wrote:

Decoupling caps are NOT polarized, normally 100nf,  and shown connected to the supply line of the chip it’s decoupling, not out in space somewhere.

Mine are indeed not polarized, I forgot to fix that in the schematic.

 

grohote wrote:

 

Can you explain what is this, and how you expect to work, please.

 

The wires coming from the boiler provide a voltage, but the wires are interchangeable. Because of this, the thermostat (which is this part of the circuit) must use a rectifier bridge (that's what the four diodes are) to make sure it knows which wire is positive and which is negative. Note that I'm currently stuck at programming the AVRs, there is no boiler connected yet. For the purpose of my question, this part does absolutely nothing.

 

avrcandies wrote:

How do you expect to spot an error if you can't see what is connected to what? Are you supposed to assemble the schematic in your head? 

I tried to keep the parts that are more or less independent separate from each other. All the pins on the "computer" and both AVRs are not in an order that makes sense for the schematic and I think it is just confusing to show all those lines, so I prefer to use the labels.

The top block of the Thermostat is just making sure the data line (which I call VDD, that's a bad idea) is "extracted" from the incoming wires. The bottom part converts the OpenTherm+ protocol to the digital I/O that the controller needs. Following the other advice, I should have connected those together and let the relative roles be clear from their left/right positioning.

 

The same is probably true for the three parallel parts of the boiler circuit.

 

avrcandies wrote:

The 2N7000 is a mealy little transistor, hardly anything for "high current"

"High" should be understood in the context of OpenTherm+: One of the signals is a serial transmission where each bit is either low (5-9 mA) or high (17-23 mA) current.

 

avrcandies wrote:

Why on Earth is there a pot on the FET gate? 

Because the protocol requires the current to be accurately controlled. A FET can be used to do that, by accurately setting the gate-source voltage. This can be done using fixed resistors, but for my prototype I prefer pots.

 

avrcandies wrote:

Get familiar with a gnd symbol and use it--another example of trouble.

I am familiar with it, but the OrangePiZero has several ground pins that are internally connected. Due to the board being crowded, I didn't want to force a connection on the PCB between the different ground wires. So for KiCAD, GND6 (the ground on pin 6) is not the same net as GND20. I looked online for how this is normally drawn, and this seemed to be the way to do it. Do you know of a better way?

 

avrcandies wrote:

Why would drawing a simple pot be done in such a contorted manner?

The main part of the boiler circuit is three parallel branches from LINE to ground. (But it doesn't help that "ground" is technically 3 different nets here.) The base current lets through a fixed 7mA. The high current lets through an additional 13 mA if it is enabled by the microcontroller. And the pot simply measures the voltage on LINE. (The thermostat sends its signal as a stream of low (0-7V) and high (15-18V) voltage; the boiler sends currents, as described above.)

 

avrcandies wrote:

As we move from left to right what is the input...looks like gnd? , INB? (also, why is the label sideways).

I wasn't aware of the left to right convention. The input in both circuits is the screw terminal. So in this case LINE. Although it could also be considered the output. Communication is bidirectional.

 

Anyway, thanks for the feedback.

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I think it is just confusing to show all those lines, so I prefer to use the labels.

Do you say the same thing about a roadmap?---try removing the lines.  This is the roadmap of your circuit, how would showing the connections be confusing?  It lets you immediately see WHAT things are are tied together, without missing anything

As an example, you have a design requirement where PA2 needs to light four LEDs and drive a power FET

So what can you immediately see?  That it is only going to THREE LEDs & the mistake is immediately obvious to anyone who is half-awake.

So you say, you'd be less confused if you couldn't see this?

 

Conversely, if someone handed you a copy of this schematic that you had never seen, and said what items does PA2 control?, how long would it take for you to figure it out conclusively??

I don't get your reasoning about less confusion, it may be more of a case of lack of effort.

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Thu. Sep 15, 2022 - 09:11 PM
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Sorry if it feels like we are picking on you and your schematic, but engineering is about details.

wijnen wrote:
The reason I added the schematic was to show that there is nothing else connected to the lines that are used for programming the AVR.

But we are unable to see that, and 3 months after you put this project down, when you come back to it, you will not see it either, and heaven help the engineer who comes after you years from now, trying to fix this boiler controller! 

 

wijnen wrote:
Mine are indeed not polarized, I forgot to fix that in the schematic.
  Details, details

 

wijnen wrote:
(And in case you want to know: this is two different systems on one board, one that pretends to be a thermostat that talks the OpenTherm+ protocol to a real boiler and one that pretends to be a boiler that talks to a real thermostat.)

Thanks for the context, it helps!

 

wijnen wrote:
The wires coming from the boiler provide a voltage, but the wires are interchangeable. Because of this, the thermostat (which is this part of the circuit) must use a rectifier bridge (that's what the four diodes are) to make sure it knows which wire is positive and which is negative.

I'm a retired engineer with industrial controls experience, where 4-20ma current loops, or 0-10v analog is common. but its also now common to add digital serial controls to these signals as well. 

A rectifier would be easier to see if drawn as one, ie. diamond shaped, thanks for the clarification. again standard engineering symbols would have made that clear to us.

 

The three grounds from the pi, should be connected (by drawing wires) to a single ground symbol, showing that they are all common.

 

Now, how are the AVRs programmed, as neither has an ISP programming header for an external programmer, or are you expecting to program them from the pi?  Tell us how your trying to program these please.

 

Jim

 

 

 

FF = PI > S.E.T

 

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avrcandies wrote:

So what can you immediately see?  That it is only going to THREE LEDs & the mistake is immediately obvious to anyone who is half-awake.

So you say, you'd be less confused if you couldn't see this?

 

Conversely, if someone handed you a copy of this schematic that you had never seen, and said what items does PA2 control?, how long would it take for you to figure it out conclusively??

I don't get your reasoning about less confusion, it may be more of a case of lack of effort.

 

This is about components with a lot of wires going to them in a pretty random arrangement (the pins are sorted by port, which makes sense when programming the firmware, but doesn't really mean anything to the schematic).

 

I'm not suggesting to use a label such as PA2 in multiple places in the schematic. Just two: once on the microcontroller, and once where it connects to. That is also how the connections to the AVR were in my schematic. I also had labels that didn't make things very clear, like LINE. I agree that those should be removed (and I'm doing that now).

 

The confusion will arise when the AVR will connect MISO, MOSI, SCK, RESET, RX and TX to the minicomputer instead of using labels. That will just make an incomprehensible mess of wires with lots of crossings. It's very hard to see which wire goes where. I suppose one solution would be to adapt the symbol for the microcontroller and/or the one for the minicomputer to use the same ordering so they will neatly connect. Would that be the better approach? So far I have used symbols from the system library if they were available.

 

And if I should adapt the symbol, would it be a good approach to split it into different parts, so e.g. the ICSP connections are in a completely different part of the schematic? That would make the drawing cleaner, but I'm not sure if it would make it more readable, because one component (the minicomputer) would have parts all over the schematic. But I suppose that's also the case with a component that contains multiple logic gates and nobody considers that a problem.

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This is about components with a lot of wires going to them in a pretty random arrangement

I'm not suggesting to use a label such as PA2 in multiple places in the schematic.

 

You say that, but yet here is a clear example.  Why is the power jack not simply connected to the power supply?  Why are you forcing a search all over the document to determine everywhere "24V" might be going?  How many places will you find after your extensive search is finished?  Wouldn't just showing the jack connected to the power supply give an immediate indication?  

 

By the way, the pot/fet  combo is ok for setting a current limit for an instant pulse experiment (i.e. happening now)--I've used that for very high power pulsing to give an instant limit for a pulse event, adjusted just before the trial.  For a fixed Vgs, the FEt will act as a current source/sink. However this will not work for an actual circuit, as the parameters will change greatly with time and temperature.  So if you carefully set a 2 amp limit, it may be at 3 amps two weeks later, depending on room temp, and whether the fet has already been running (heated up). Use an actual circuit and have some accuracy and stability.

Just two: once on the microcontroller, and once where it connects to.

just ONE, you seem to have a trouble following this.  You would use two if there were no alternative, such as trying to route 30 lines inside a 3x3 inch space.  

 

Yes, it does take some time and effort to organize things.  Make it easy for the person your are giving the schematic to.

You can also clump a bank of port pins (or others) as a "bus" together and route the clump (like a hose) to a destination and spread them out again.  Once again , it is easy to follow from point A to B.

Busses should generally contain the same wires entering as one group and exiting as one group (or copies of the same group), to the extent possible.  It is not a trench just to throw things into at random and bury them.

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Thu. Sep 15, 2022 - 10:02 PM
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avrcandies wrote:

This is about components with a lot of wires going to them in a pretty random arrangement

I'm not suggesting to use a label such as PA2 in multiple places in the schematic.

 

You say that, but yet here is a clear example.

Yes, I gave another example in my post. I'm fixing those now.

 

However, isn't it very normal to have power connections (specifically, VCC and GND) present many times in a schematic, without showing the lines? Nobody asks "how can I see which components connect to ground?" To me, it is the same for the +24V. I have just connected the barrel jack to the dc-dc converter, but those are conceptually in the same unit. There's also a +24V connection in one of the screw terminals, and I don't think it helps to place the power circuit next to it, or to draw a long line from the power circuit to the screw terminal. It's a supply voltage, just like VCC is for the microcontrollers.

 

avrcandies wrote:

just ONE, you seem to have a trouble following this.  You would use two if there were no alternative, such as trying to route 30 lines inside a 3x3 inch space.  

So just to check: you agree that I should adapt the symbols so the pins are organized in a way that corresponds to the board?

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So while I still have no answer for my question, this has been very useful. Thanks again for the feedback on my schematic. Here's an updated version for those who feel like giving me more comments.

 

The part that is relevant to my question is also more clear now:

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 I have just connected the barrel jack to the dc-dc converter, but those are conceptually in the same unit. There's also a +24V connection in one of the screw terminals, and I don't think it helps to place the power circuit next to it, or to draw a long line from the power circuit to the screw terminal. 

That is true, however the jack and the supply are right next to each other, so there is no reason to avoid connecting them.  If there is no strong reason, do so. It took some time to find the screw you mentioned, since scanning the page didn't find a supply voltage, since the 24V was pointing down.  Remember gnd points down , voltages point up (unless not possible to do so).  This is sicne as you trace the current you generally proceed left to rignt and top to bottom, just like reading a book.  Going up or to the left is like driving down the street in reverse, sometime unavoidable.

 

Your new update is 100 times better than the first.  Now Q1 & Q2 are backwards, the gates should be on the left (and move the pots to the left of the transistors)...remember left to right.

 

Caps C1 and C2 are better on the right side pointing toward gnd, since you had that flexibility.  This is very minor nit-pickyness, but the more you brush things up the clear the room. Maybe you are trying to keep a balanced appearance, since the left only had 2 wires?

 

Also it is preferable if text is only sideways when necessary (it may also be an editor limitation)...you will often see sideways text when components need placed close together.

 

 

 

Text should not overlap anything---why make things hard to read?  Make a copy, then a copy of that copy on the office copier; they'll say who did this?....move it

 

Are you using these connections elsewhere?  They seem to go nowhere 

 

 

Also, it didn't come up before, but never draw a 4 way connection, since that can lead to severe errors if missed (or assumed), always use 3 way junctons instead.  A reduced (vs enlarged) copy  or cut/pasted, or poor lighting, or just taking a quick glance can loose the "dots" and the whole thing can fail, especially if a technician leaves one out. 

Since you made sure to avoid 4-way dots, it is easy to see without ambiguity there will be no connection between the red and blue elements.

 

Do you find your new drawing getting more understandable (pretend you had never seen it before)?

 

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Fri. Sep 16, 2022 - 01:23 AM
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see this link #21 for exactly what I'm talking about

 

https://www.avrfreaks.net/forum/...

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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avrcandies wrote:

Your new update is 100 times better than the first.

Thanks!

 

avrcandies wrote:

Now Q1 & Q2 are backwards, the gates should be on the left (and move the pots to the left of the transistors)...remember left to right.

Text should not overlap anything---why make things hard to read?  Make a copy, then a copy of that copy on the office copier; they'll say who did this?....move it

Fixed, thanks.

 

avrcandies wrote:

Caps C1 and C2 are better on the right side pointing toward gnd, since you had that flexibility.  This is very minor nit-pickyness, but the more you brush things up the clear the room.

I appreciate it. I did this because it seemed logical to go from ground to VCC, just like counting from 0 to 5 the 0 would be on the left. But that is of course not how things should be arranged on a schematic.

 

avrcandies wrote:

Also it is preferable if text is only sideways when necessary (it may also be an editor limitation)...you will often see sideways text when components need placed close together.

For vertical pins, KiCAD does not support anything else indeed. For other text, I'll keep it in mind.

 

avrcandies wrote:

 

Are you using these connections elsewhere?  They seem to go nowhere 

Those are local labels. They cannot be used to "draw" a connection without a wire, like global labels can (those are the ones in a box that I've all removed). Local labels are used to name a net of wires. In this case, some of them (like the ones you show here) may seem to just duplicate what's right next to them. The reason I use them anyway is that a net without a name will get a generated name in the PCB editor. Adding those net names thus makes the PCB design much more pleasant. Here's a part of the PCB with the labels for pin 23 and 24 removed:

 

I didn't need any local labels before, because a global label also sets the net name.

 

avrcandies wrote:

Do you find your new drawing getting more understandable (pretend you had never seen it before)?

Yes, absolutely. Thanks for helping me with this.

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Wow, that is so much better, like washing your car 3 times in a row.

I'm not certain about your having all these different grounds---for what reason?  For example you are saying pin 10 of one tiny must be separated from pin 10 of the other tiny in the layout (the separation is kept throughout the layout)..maybe you like that, but it will be much less efficient (unless you NEED to have this separation).  You could simply combine the Orange pi incoming gnd pins 5/20/25 into a single GND and go from there). Perhaps you are trying t maintain what you already did, but plan for the next round.

 

The current limiter, will be ok if you plan on adjusting it all the time, otherwise you will be unhappy when things heat up ---it will be a very touchy , sensitive setting, like balancing a marble on your finger.

 

Not sure what the plan is for Q4, you are trying to make a selection of range---but between what and what? Note the diode bridge negative output is headed for the AVR, so that may be an unplanned trouble spot  (perhaps bridge GND is positive with respect to AVR GND1?).  Forcing a negative voltage to any AVR pin will soon result in a bad situation. Start hiding when you reach -1V.

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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Related to my question#2, I am asking you again: how this can work. Diodes are preventing any current from left side towards Zeners. Also, use of selector is obscure.

 

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avrcandies wrote:

I'm not certain about your having all these different grounds---for what reason?

They are not physically separated, the OrangePi connects them. But if I make them the same ground in the schematic, the board designer will tell me that I need to connect them on the board. Which in some cases is really hard because there's no space for the trace. I don't want to put the trace that I don't need there and I don't want the board to look like it's broken. This way both those things work. The only downside is that it looks a bit weird in the schematic.

 

avrcandies wrote:

The current limiter, will be ok if you plan on adjusting it all the time, otherwise you will be unhappy when things heat up ---it will be a very touchy , sensitive setting, like balancing a marble on your finger.

I don't expect things to heat up much, so I hope it'll work. But I'll keep it in mind. I also already found some other problems which I need to fix before it can work, so perhaps I'll replace them before the first test anyway.

 

avrcandies wrote:

Not sure what the plan is for Q4, you are trying to make a selection of range---but between what and what?

The protocol requires the AVR to set the voltage to either 15V or less than 7V. RV2 has low resistance, but the current is limited by the boiler, so the voltage over RV2 is always below 3V. D6 is only there in case the boiler misbehaves, it should never let any current through. Anyway, Q4 lets the AVR select whether there is 15V or less than 3V on the line to the boiler.

 

avrcandies wrote:

Note the diode bridge negative output is headed for the AVR, so that may be an unplanned trouble spot  (perhaps bridge GND is positive with respect to AVR GND1?).  Forcing a negative voltage to any AVR pin will soon result in a bad situation. Start hiding when you reach -1V.

Yes, I just noticed that this was a mistake. All those diodes should be reversed.

 

grohote wrote:

Related to my question#2, I am asking you again: how this can work. Diodes are preventing any current from left side towards Zeners. Also, use of selector is obscure.

They let current through, they make sure the current is always flowing the wrong way. Oops. ;-) Fixed that, thanks.

 

Is my explanation about the selector in this post enough to unobscure it, or is it still unclear? If so, please tell me what is unclear about it.

 

Thanks again!

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They are not physically separated, the OrangePi connects them. But if I make them the same ground in the schematic, the board designer will tell me that I need to connect them on the board. Which in some cases is really hard because there's no space for the trace. I don't want to put the trace that I don't need there and I don't want the board to look like it's broken. This way both those things work. The only downside is that it looks a bit weird in the schematic.

I think you have it backwards...it is easier to have one signal A that routes to 21 places ,than 3 different  signals routing to 7 places each, and which much also be kept separated from each other in 3 groups. since the 3 originate from essentially the same point (connector), they originate like A does.

Combine your signals at the connector into gnd.  Use the bottom layer as gnd, it will form a large plane accessible by all.  Route your few traces on the top side.  There may be occasional need to drop down for a very short trace (no moe than 1/2 inch, to from a "jump over".  You can very easily do that with this simple board. 

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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wijnen wrote:
Is my explanation about the selector in this post enough to unobscure it

 

 

How you can call it High/low voltage selector? It is a simple Gate or Enable. Zener D6 will have, or not have current from the left side, which is obscure, because we presume it have an own voltage source, but it is not shown here. How strong it is, can it destroy this petty transistor, wonder. What is the value of resistor for ADC?

 

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avrcandies wrote:

I think you have it backwards...it is easier to have one signal A that routes to 21 places ,than 3 different  signals routing to 7 places each, and which much also be kept separated from each other in 3 groups. since the 3 originate from essentially the same point (connector), they originate like A does.

Combine your signals at the connector into gnd.  Use the bottom layer as gnd, it will form a large plane accessible by all.  Route your few traces on the top side.  There may be occasional need to drop down for a very short trace (no moe than 1/2 inch, to from a "jump over".  You can very easily do that with this simple board. 

The way I have it designed now (which may not be ideal), there is no space for that. I have components both on the front and the back just to make it fit. The space is so limited because I want it to be the same size as the board it plugs onto.

 

You describe it as if I first choose which ground to use for each pin and then I am restricted to that when routing. That is not at all how this works. I first select the same ground for all pins. Then when I find during routing that it's easier to reach a different ground pin, I change it in the schematic. This is the same approach I use for choosing gpio pins. Initially I just assign them arbitrarily and during routing I see which ones are most easily accessible and I change the schematic to use those.

 

grohote wrote:

How you can call it High/low voltage selector? It is a simple Gate or Enable. Zener D6 will have, or not have current from the left side, which is obscure, because we presume it have an own voltage source, but it is not shown here. How strong it is, can it destroy this petty transistor, wonder. What is the value of resistor for ADC?

I call it a selector because it selects whether there will be a high or a low voltage on the line to the boiler. It does not generate this voltage; it makes it happen by changing the resistance. This works, because the boiler is a current source, which keeps the current at either 7mA or 20mA (for 0 and 1 signalling respectively). If this circuit shorts it to ground (or uses a very small resistor, as I do so I can measure the current), the voltage will drop to (near) zero. This is why I can use this gate to select the voltage.

 

It's not going to the ADC (the attiny2313 doesn't have one), but to the analog comparator; it's compared to the internal bandgap voltage. The pot is used to set the current that will match the threshold voltage of 1.1V. For a current of 13mA, the value should be 85Ω.

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Pay attention what is Q4 doing. What happen if the gate is at 5V, what happen if at 0V.

 

Repeat- it is not selector, it just stops current from sensor, that is all. Check, recheck, think, please.

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 I have components both on the front and the back just to make it fit. 

How big?  There are barely any components here, certainly not enough for most double sided placement. Are you using 063 size parts? With the small handful of parts, there is small chance you would need to put components on both sides.  Maybe try round II.

 

Your explanation about gnd seems farfetched. One gnd type (gnd name) will be easier to route than three different types that must maintain separation between them across the board.  PERIOD.

 

 

I noticed these GIGANTIC gaps in your schematic before, but kept quiet, since there were so many other things that needed corrected.  Now this is an issue.  When opening on the small download screen, when the schematic is zoomed up a bit, most of it is unviewable, since it goes off window, due to these massive gaps.  Are the parts radioactive or afraid of each other??  This also applies to putting in a report, if pasted and shrunk down to fit in an area, it will need shrunk so excessively that it becomes very hard to read.

 

I call it a selector because it selects whether there will be a high or a low voltage on the line to the boiler. It does not generate this voltage; it makes it happen by changing the resistance. This works, because the boiler is a current source, which keeps the current at either 7mA or 20mA (for 0 and 1 signalling respectively). If this circuit shorts it to ground (or uses a very small resistor, as I do so I can measure the current), the voltage will drop to (near) zero. This is why I can use this gate to select the voltage.

Ok, the boiler is generating a current and you pick a resistance to make more or less voltage from it....what is using this selection?  Certainly not the AVR , as it has a comparator, to determine hi/lo depending on whether 7 ma (lo) or 20ma (hi) is being sent over to the resistor to the AVR comparison.

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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While I generally have no issues with schematics, and scold those who are of the opinion that they are the all authority on his subject, in this case I have to agree your original schematic is painful.  Oh, and I would not power it up based on that bridge rectifier layout, and the 15v zener is gonna blow if you power with 24v, but because your power rails are not defined, it’s anyones guess.  If the power flag connections are common, then you are going to have a bigger problem than programming issues, but I’ll let the others have at it with that.

 

while those who choose to nitpick the schematic can do so.  I am going to your original question.

 

but to do that requires me to nitpick your schematic….funny how that happens eh?

 

based on your schematic I have no idea where the header for programming is.  I find out later that it’s connected to some Orange thingie.  Can you explain what the header looks like on the Orange thingie, or do I need to go googling?  Hint…I am not going googling.

 

are the Tinys dip or SMD?  If dip, then put them in a breadboard, and try programming them.  Cut as many variables out as possible.

you mention that you are using the internal RC oscillator.  That’s fine, but what is your programming clock frequency?  Set your programming click frequency to 125KHz and see what happens.

 

cheers,

Jim

I would rather attempt something great and fail, than attempt nothing and succeed - Fortune Cookie

 

"The critical shortage here is not stuff, but time." - Johan Ekdahl

 

"Step N is required before you can do step N+1!" - ka7ehk

 

"If you want a career with a known path - become an undertaker. Dead people don't sue!" - Kartman

"Why is there a "Highway to Hell" and only a "Stairway to Heaven"? A prediction of the expected traffic load?"  - Lee "theusch"

 

Speak sweetly. It makes your words easier to digest when at a later date you have to eat them ;-)  - Source Unknown

Please Read: Code-of-Conduct

Atmel Studio6.2/AS7, DipTrace, Quartus, MPLAB, RSLogix user

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grohote wrote:

Pay attention what is Q4 doing. What happen if the gate is at 5V, what happen if at 0V.

 

Repeat- it is not selector, it just stops current from sensor, that is all. Check, recheck, think, please.

 

The boiler is a current source. If the gate of Q4 is low, it is closed and there will be 7mA going through the 15V zener, so the boiler will measure 15V on its output (it outputs 7mA and measures how much voltage it was supplying to make that flow).

If the gate of Q4 is high, it is open and there will be 7mA or 20mA (depending on what the boiler is sending at the time) going through RV2. As a result, the voltage on IN-T and also on the line to the boiler (ignoring the voltage drop of the diodes for simplicity) will be less than or more than 1.1V depending on whether the boiler is sending 7mA or 20mA, but in both cases it will be far less than 3V.

 

So Q4 does not generate or apply the voltage, it lets the current through and the boiler will respond to that by dropping the voltage that it applies. That's what it means to be a current source (as opposed to a voltage source).

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avrcandies wrote:

 I have components both on the front and the back just to make it fit. 

How big?  There are barely any components here, certainly not enough for most double sided placement. Are you using 063 size parts? With the small handful of parts, there is small chance you would need to put components on both sides.  Maybe try round II.

The board is 5cm x 5cm. It would probably fit if I used smaller pots. I like the larger ones, though. But I might do it differently next time, indeed.

 

avrcandies wrote:

Your explanation about gnd seems farfetched. One gnd type (gnd name) will be easier to route than three different types that must maintain separation between them across the board.  PERIOD.

There is no requirement that they must remain separated. If they can easily connect, I do that. It makes routing slightly easier, because then I don't need to change the schematic while I'm routing. But that's very minor, because it's a very simple operation; I have both windows open anyway, I just swap out the connection (that was actually easier with the labels, then I only needed to change the label) and it's done.

 

avrcandies wrote:

I noticed these GIGANTIC gaps in your schematic before, but kept quiet, since there were so many other things that needed corrected.  Now this is an issue.  When opening on the small download screen, when the schematic is zoomed up a bit, most of it is unviewable, since it goes off window, due to these massive gaps.  Are the parts radioactive or afraid of each other??  This also applies to putting in a report, if pasted and shrunk down to fit in an area, it will need shrunk so excessively that it becomes very hard to read.

I did this to make the text underneath it fit. It's getting pretty wide indeed, but it still fits on the page, which is what I used as the constraint.

 

avrcandies wrote:

Ok, the boiler is generating a current and you pick a resistance to make more or less voltage from it....what is using this selection?  Certainly not the AVR , as it has a comparator, to determine hi/lo depending on whether 7 ma (lo) or 20ma (hi) is being sent over to the resistor to the AVR comparison.

Correct. The protocol requires the boiler to be a current source. The boiler sets the current (which is what a current source does) and measures the voltage. The thermostat measures the current and sets the voltage (by changing the resistance).

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jgmdesign wrote:

While I generally have no issues with schematics, and scold those who are of the opinion that they are the all authority on his subject, in this case I have to agree your original schematic is painful.

Thanks, I appreciate your work. And while the original style was quite unfriendly, I appreciate the tips and thankfully by now the thread has become very pleasant.

 

jgmdesign wrote:

Oh, and I would not power it up based on that bridge rectifier layout, and the 15v zener is gonna blow if you power with 24v, but because your power rails are not defined, it’s anyones guess.  If the power flag connections are common, then you are going to have a bigger problem than programming issues, but I’ll let the others have at it with that.

Yes, the rectifier was wrong originally, that would have been a problem indeed. With that fixed, the zener should not have a problem though, because the boiler is a current source, not a voltage source. It will put a maximum of 40V (I think, didn't check) on the line, but because it's a current source, it will drop to whatever is right for the current it is pushing through. So with a zener it will simply pass through that at its voltage (in this case 15V) and the current will be what the boiler uses (which is 7mA, because the protocol does not allow the high (20mA) current while the voltage is high).

 

jgmdesign wrote:

based on your schematic I have no idea where the header for programming is.  I find out later that it’s connected to some Orange thingie.  Can you explain what the header looks like on the Orange thingie, or do I need to go googling?  Hint…I am not going googling.

The OrangePi is a mini-computer similar to the Raspberry Pi. The header is a 2x13 male pin header. My board uses a 2x13 female pin header to plug onto it. It also uses a 1x13 header on the other side of the board, but that is just for mechanical stability; none of those pins are connected.

 

The OrangePi runs at 3.3V (and cannot handle 5V on its gpio pins), which is why I'm powering the AVRs from its power output, not from the 5V that powers the OrangePi itself.

 

jgmdesign wrote:

are the Tinys dip or SMD?  If dip, then put them in a breadboard, and try programming them.  Cut as many variables out as possible.

They are SMD. I did just solder another one on a board with only its capacitor, the dc-dc converter, barrel jack and the 2x13 pin header connected, leaving all the other components (including the other tiny) off. It gives the same result.

 

jgmdesign wrote:

you mention that you are using the internal RC oscillator.  That’s fine, but what is your programming clock frequency?  Set your programming click frequency to 125KHz and see what happens.

I tried setting the -B option to avrdude (which if my understanding to avrdude's documentation is correct, would set this frequency) to a high number (1000μs, so 1KHz). It the attempt very slow (it took seconds just to read the signature), but still it said there was no reply.

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There is no requirement that they must remain separated.

Then that is my original point...bring the pins into something called GND, so the board has one signal called GND. 

 

If they are named separately THAT MEANS you are keeping them separated (otherwise they would not have different names).    

 

Again, it is easier to route one named net everywhere than maintain two named nets, joined only at a common point.

 

In fact, some programs won't allow this at all, and you need to use zero ohm jumpers to trick tie such nets together--- say GND came in  and you wanted to split it into separated  GNDA and GNDB from that common point onward, you'd need to go through a dummy part to take up a new name.

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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avrcandies wrote:

There is no requirement that they must remain separated.

Then that is my original point...bring the pins into something called GND, so the board has one signal called GND. 

 

If they are named separately THAT MEANS you are keeping them separated (otherwise they would not have different names).    

 

Again, it is easier to route one named net everywhere than maintain two named nets, joined only at a common point.

 

In fact, some programs won't allow this at all, and you need to use zero ohm jumpers to trick tie such nets together--- say GND came in  and you wanted to split it into separated  GNDA and GNDB from that common point onward, you'd need to go through a dummy part to take up a new name.

 

No, you are missing the point. The nets are not connected on the PCB. If it was easy to do that, I would have done it. But they are connected internally in the OrangePi. Its header has several ground pins which are all connected to each other. So anything that is connected to any of those pins is connected to the same physical net.

 

But KiCAD doesn't allow that. So if I draw them as being the same net, it will require that I connect all the ground pins on the header together. And they are not close to each other, there are many pins in between and it's just not practical to connect them. Also, from a philosophical perspective, I don't want to make hardware changes to the design just because the software doesn't understand what I want.

 

I think it would be ideal if KiCAD would allow me to specify that the header pins are internally connected. But it doesn't. So my options then are to do it this way, and mark the different parts of the ground net as separate nets, or to mark them as the same net and omit the connections. My choice results in a slightly weird system with several grounds, which is easy to understand once you know they are really the same. The other option means the board designer program will complain that I'm missing connections.

 

Of course the third option is to make redundant connections on the PCB. In some cases that may be a good idea for other reasons, but if it isn't, I don't want to do that just to please the software.

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Ok, dumb question time.

 

based on your response to my notes you already have PC boards made, and you have set one up with just the tinys on it.  From my understanding, there are TWO ISP headers.  One for each Tiny.  Do you have any other AVR programmer available that you could use to test program teh Tinys to confirm your board is properly configured?

 

Jim

I would rather attempt something great and fail, than attempt nothing and succeed - Fortune Cookie

 

"The critical shortage here is not stuff, but time." - Johan Ekdahl

 

"Step N is required before you can do step N+1!" - ka7ehk

 

"If you want a career with a known path - become an undertaker. Dead people don't sue!" - Kartman

"Why is there a "Highway to Hell" and only a "Stairway to Heaven"? A prediction of the expected traffic load?"  - Lee "theusch"

 

Speak sweetly. It makes your words easier to digest when at a later date you have to eat them ;-)  - Source Unknown

Please Read: Code-of-Conduct

Atmel Studio6.2/AS7, DipTrace, Quartus, MPLAB, RSLogix user

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wijnen wrote:

No, you are missing the point. The nets are not connected on the PCB. If it was easy to do that, I would have done it. But they are connected internally in the OrangePi. Its header has several ground pins which are all connected to each other. So anything that is connected to any of those pins is connected to the same physical net.

 

If you think that two ground nets connected together 'somewhere else' are the same ground then you are badly mistaken.

 

See#3 below.

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

Last Edited: Mon. Sep 19, 2022 - 02:26 PM
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But KiCAD doesn't allow that. So if I draw them as being the same net, it will require that I connect all the ground pins on the header together. And they are not close to each other, there are many pins in between and it's just not practical to connect them.

 Yes ki won't allow because you start by saying they are different.  I already mentioned that.  If you want separate named nets connected at one point , but keeping different names, you often need to do some tricks, such as going through zero ohm resistors, or just forcing a bit of copper.

But you don't have that situation here.

You have a PI header & KI doesn't care.  Say pins 8, 12, 27 were different gnd names on the pi (maybe gnd, gnd1 , agnd)

On YOUR board they are just called gnd at the header and KI will treat them like that everywhere on your board as GND.

 

And they are not close to each other, there are many pins in between and it's just not practical to connect them.

That's a ridiculous statement, and you most certainly can connect them together at the header on your board. It's not like a motherboard with 10 gnd pins scattered around on a 100 pin connector.

The easiest is to just form a gnd plane under the header & drop your different header gnd pins into the gnd plane

 

 I don't want to make hardware changes to the design just because the software doesn't understand what I want.

For such a simple connection---just  form GND on your board and all will be well.  Whatever various gnd pins exist on the pi, will connect to it. 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Mon. Sep 19, 2022 - 07:15 PM
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jgmdesign wrote:

Ok, dumb question time.

 

based on your response to my notes you already have PC boards made, and you have set one up with just the tinys on it.  From my understanding, there are TWO ISP headers.  One for each Tiny.  Do you have any other AVR programmer available that you could use to test program teh Tinys to confirm your board is properly configured?

 

Jim

Yes, I have a few boards and there are indeed two sets of pins within the connector to do the ISP. I don't think I currently have another operational programmer. I do however have many Arduino boards. When I connect one of those to the same pins of the connector, it can program it just fine. So as a programmer, the OrangePi works as it should.

 

So that means either the board is wrong, the AVRs are broken, or my soldering is bad. That last one is always an option, but it looks fine under the microscope.

 

The AVRs came from AliExpress, which means I'm not entirely confident about them either. I haven't had any broken parts from them so far though, so it would still surprise me a bit.

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wijnen wrote:

So that means either the board is wrong, the AVRs are broken, or my soldering is bad. That last one is always an option, but it looks fine under the microscope.

 

The AVRs came from AliExpress, which means I'm not entirely confident about them either. I haven't had any broken parts from them so far though, so it would still surprise me a bit.

 

Based on what I am reading in this thread, all three are possibilities.

 

I would certainly do a continuity check on teh lines from teh AVR to your header to make sure you do not have something backwards.  MOSI and MISO are commonly reversed.

 

So, until you can get those Tinys talking to your orange programmer thingie, which only you can accomplish, this thread is at a standstill.

 

Cheers,

Jim

I would rather attempt something great and fail, than attempt nothing and succeed - Fortune Cookie

 

"The critical shortage here is not stuff, but time." - Johan Ekdahl

 

"Step N is required before you can do step N+1!" - ka7ehk

 

"If you want a career with a known path - become an undertaker. Dead people don't sue!" - Kartman

"Why is there a "Highway to Hell" and only a "Stairway to Heaven"? A prediction of the expected traffic load?"  - Lee "theusch"

 

Speak sweetly. It makes your words easier to digest when at a later date you have to eat them ;-)  - Source Unknown

Please Read: Code-of-Conduct

Atmel Studio6.2/AS7, DipTrace, Quartus, MPLAB, RSLogix user

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avrcandies wrote:

But KiCAD doesn't allow that. So if I draw them as being the same net, it will require that I connect all the ground pins on the header together. And they are not close to each other, there are many pins in between and it's just not practical to connect them.

Yes ki won't allow because you start by saying they are different.  I already mentioned that.  If you want separate named nets connected at one point , but keeping different names, you often need to do some tricks, such as going through zero ohm resistors, or just forcing a bit of copper.

But you don't have that situation here.

That is also not the thing that I was talking about when I said KiCAD won't allow it. What it won't allow is having two nets that are not connected on the board (like GND and GND1 in this case), but that are connected inside a component, and that therefore have the same name. Because if I say they have the same name, KiCAD wants me to connect them on the board.

 

avrcandies wrote:

You have a PI header & KI doesn't care.  Say pins 8, 12, 27 were different gnd names on the pi (maybe gnd, gnd1 , agnd)

On YOUR board they are just called gnd at the header and KI will treat them like that everywhere on your board as GND.

Yes, of course it is possible to tell it that they are the same net. And then it will tell me I need to connect those pins together. I just explained that I don't want that.

 

avrcandies wrote:

 I don't want to make hardware changes to the design just because the software doesn't understand what I want.

For such a simple connection---just  form GND on your board and all will be well.  Whatever various gnd pins exist on the pi, will connect to it. 

In other words, what you're saying is: just connect them because it makes the software happy. My entire point here is that I refuse to treat software like that. It should do what I want, not the other way around.

 

The fact that it might be possible with this board (and you're right, it probably isn't too hard in this case) is irrelevant for this point.

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wijnen wrote:
My entire point here is that I refuse to treat software like that. It should do what I want, not the other way around.

 

Ok, fair enough.  I wasnt gonna get into teh Schematic war going on in this thread, but you are missing something rather important here.

 

As you wrote:

wijnen wrote:
But they are connected internally in the OrangePi. Its header has several ground pins which are all connected to each other. So anything that is connected to any of those pins is connected to the same physical net.

 

I cannot understand why you would want teh ground..which is supposed to be common throughout the board, to suddenly 'split' if/when teh Ornage thingie is removed. What could happen is that components that are not supposed to conduct, just might because one is at a lower potential than the other.  The magic smoke coming from those components will prove this point.  We see this conduction often in USART threads where teh ground/common line on one side is broken and 'magically' one side keeps going with power removed.  Why?  The tx/rx lines start doing things they should not, and the AVR protection diodes start conducting when they should not.

 

You deciding to use the Orange Thingie to bridge teh grounds is unwise, but hey!  You want the software to do what you want as opposed to the software politely hinting that you are doing something that is not only wrong, but potentially destructive.  Too each their own.

 

Oh, that 15v zener diode you have across teh output of teh reversed bridge rectifier....I saw somewhere in the posts +24v...If that 24v gets on that diode....its gonna smoke immediately as there is no protection for it.

 

Lastly.  your 'PWR_FLAG' net I saw in post #2.  If those are indeed the same net, then you are effectively shorting the bridge rectifiers output.  Could you shed some light on where those two points go?

 

I stopped using Kicad when I purchased a DipTrace license.  When I created the 'split' grounds like you have, and ran the Electrical Rules Check, it spit up an error:

 

Now, I can 'fool' the software by connecting teh two ground nets as shown, and get no errors:

 

But here in lies a few points.  The PCB software will 'think' that I do want the grounds connected and when I route the board, and try to 'split' them as you have, the PCB software will spit up an error that the grounds are not connected.  And in the case of my software, will not generate gerber files.

 

In DipTrace, I can connect my grounds to headers like you want to do, and the software Electrical Rules Check will not spit up an error.  But this is not really advisable as we all have tried to explain to you.  This has been brought up in the DipTrace forums, but its been a slow go getting teh creators to change teh software to at least kick up a warning.

 

BUT, in the case of teh PCB part of DipTrace it will let me know that the grounds are not connected.

 

So while Kicad my not "Do what you want it to do" maybe you need to look at the help files and see if there is anything that allows you to add an exception to the nets.  I find it funny that your Freeware CAD software can do what my fully paid license cannot.  At teh moment at least.

 

 

So, with all of that said, if you are that confident in your schematic, and your PCB et. al. I will ask teh community members that are posting in this thread to STOP TRYING TO CORRECT THE OP's SCHEMATIC!!!  If The OP feels there is nothing wrong with it, so leave it alone.

 

Meanwhile let us know what you can find out regarding the AVR's and The Orange Thingie not communicating. 

 

Cheers!

Jim

 

I would rather attempt something great and fail, than attempt nothing and succeed - Fortune Cookie

 

"The critical shortage here is not stuff, but time." - Johan Ekdahl

 

"Step N is required before you can do step N+1!" - ka7ehk

 

"If you want a career with a known path - become an undertaker. Dead people don't sue!" - Kartman

"Why is there a "Highway to Hell" and only a "Stairway to Heaven"? A prediction of the expected traffic load?"  - Lee "theusch"

 

Speak sweetly. It makes your words easier to digest when at a later date you have to eat them ;-)  - Source Unknown

Please Read: Code-of-Conduct

Atmel Studio6.2/AS7, DipTrace, Quartus, MPLAB, RSLogix user

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jgmdesign wrote:

You deciding to use the Orange Thingie to bridge teh grounds is unwise, but hey!  You want the software to do what you want as opposed to the software politely hinting that you are doing something that is not only wrong, but potentially destructive.  Too each their own.

No, I'm fine with hints, and I'll happily follow them if they seem sensible. This was not a warning with any reasoning though, so it didn't look like a hint (I also still think it isn't one, just an implementation detail).

 

I don't want to make changes to my hardware just to please the software. But of course I do want to make changes if it makes the hardware better. You gave good reasons for attaching the ground on the board, so I've done that now.

 

Still my view is that this is a valid way of splitting (in the eyes of KiCAD) a net when it's really not split is fine, at least for anything that is not ground. For example, there are also multiple VCC outputs on the header. I do not feel the need to connect them together and would have no problem with using each for some components. If you believe that is also a bad idea, I'd like to hear about that. Because in that case I might agree with you and change my workflow.

 

jgmdesign wrote:

Oh, that 15v zener diode you have across teh output of teh reversed bridge rectifier....I saw somewhere in the posts +24v...If that 24v gets on that diode....its gonna smoke immediately as there is no protection for it.

No, that's not correct. The boiler is a current source. It may be capable of supplying 24V, but if current flows (as it would through the zener), it drops.

 

Oh, and the bridge rectifier was not supposed to be reversed.

 

However, this does point to something that I'm not very happy with and I'm not sure how to do better: the two branches of this circuit are supposed to be on opposite sides of the line between a boiler unit and a thermostat. Each branch behaves as the real unit would and can replace it without problems for the other side. And if I'd make two of these boards and connect the thermostat branch on one board to the boiler branch on the other, it should work fine. However, that suggests that connecting both screw terminals with cable would also work as a loopback test, and it most certainly doesn't. This is because they don't use the same ground and connecting them would indeed put a 24V voltage source on the zener.

 

This is due to the way I implemented the current source, which is using the mosfets. Is there a better way to do this, preferably in such a way that a loopback connection would be possible?

 

jgmdesign wrote:

Lastly.  your 'PWR_FLAG' net I saw in post #2.  If those are indeed the same net, then you are effectively shorting the bridge rectifiers output.  Could you shed some light on where those two points go?

They don't go anywhere and don't connect anything. They simply tell the system that there is a power source on the net. It silences an ERC warning that power input pins are not powered. Now that I started editing the AVR symbols, I went ahead and also made a custom barrel connector, which is identical to the one from the library except that its pins are specified as "power output".

 

jgmdesign wrote:

In DipTrace, I can connect my grounds to headers like you want to do, and the software Electrical Rules Check will not spit up an error.  But this is not really advisable as we all have tried to explain to you.  This has been brought up in the DipTrace forums, but its been a slow go getting teh creators to change teh software to at least kick up a warning.

This sounds like the same behavior that I see from KiCAD.

 

What kind of warning would you expect? If you have two different grounds and keep them separated on the PCB, I'd say it's pretty clear that this is exactly what you're trying to do. So I'd be annoyed if it'd give a warning in that case. Well, it'd be fine (good actually) if it was possible to silence it somehow.

 

jgmdesign wrote:

So while Kicad my not "Do what you want it to do" maybe you need to look at the help files and see if there is anything that allows you to add an exception to the nets.  I find it funny that your Freeware CAD software can do what my fully paid license cannot.  At teh moment at least.

From what you showed, it seems that both do the exact same thing. What does KiCAD allow that DipTrace does not?

 

jgmdesign wrote:

So, with all of that said, if you are that confident in your schematic, and your PCB et. al. I will ask teh community members that are posting in this thread to STOP TRYING TO CORRECT THE OP's SCHEMATIC!!!  If The OP feels there is nothing wrong with it, so leave it alone.

Thanks. It is indeed fine to agree to disagree and I don't want people to keep bothering me about things. However, in this thread I have received a lot of tips for improving my schematic. If @avrcandies would have continued saying I should just connect the grounds without giving an argument (other than it being easy and it silences a warning), I would have suggested we agree to disagree. But other than that, I welcome those tips.

 

jgmdesign wrote:

Meanwhile let us know what you can find out regarding the AVR's and The Orange Thingie not communicating. 

It might take a while, as I'm currently unsure how to proceed. But I'll let you know when I try something.

 

Thanks for all the help!

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wijnen wrote:

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PDF icon opentherm.pdf

 

Grounding rubbish. Short circuit on wrong connection (both possible connections are wrong).

 

No, I will not try to correct this asylum-schematics, as Jim ordered.

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grohote wrote:

Grounding rubbish. Short circuit on wrong connection (both possible connections are wrong).

 

No, I will not try to correct this asylum-schematics, as Jim ordered.

If you want to help me make it better, please do.

If not, why are you posting this?

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I'm glad you are connecting the gnds together--that is by far, the proper way, unless you truly need what is known as a star gnd...a common point where gnds tie together, but they keep their physical independence & semi electric independence from each other (by that it means gnd over here is not exactly the same as gnd over there,  due to the intended physical separation).  Just like the gnd in your bathroom is "different" from the gnd in the kitchen, even though they tie together in the fuse box.

 

There are reasons to do that on a pcb, such as isolating noisy sections from super-quiet sections.

HOWEVER, many PCB systems won't , or not easily, allow such a setup, since it (usually) must assign the exact same name to anything touching together anywhere.  Fancier system do allow it; it makes the internal tracking potentially much more complicated.  Did Joe talk to Bill?--that's simple to say.  But if each can be called by 7 different names, it is a lot more complex to keep track of, especially when we are talking about 1000 other conversations.  Same with traces software.

  

As mentioned before, the simplest workaround is often to use resistors as fake "jumpers", then either install zero ohm resistors, or force some copper between the pads & ignore any warnings.

 

A star gnd setup is generally harder to route from a common PCB point by its very nature, at least it won't be easier.

You were attempting to make a star gnd, but the star was on your other board, which opens a can of worms; and plus, you didn't require a star gnd in the first place. You can (and did) find a way to tie all the connector gnd pins together on your board.  So there is no star on your board (and probably none on the orange pi).

For example, there are also multiple VCC outputs on the header. 

That's so you can assure you get a solid power connection (3 nails better than one).  Connectors are often the least reliable component, and the last thing you want is pwr or gnd intermittent.  This also means you can draw " a lot of" current through the connections.  If you had a 20 amp driver, you might use several heavy duty pins to deliver that power.

At your itty bitty currents, one is plenty, but double or triple up and you can afford a corroded or loose pin.

This is due to the way I implemented the current source, which is using the mosfets. 

your 24v/q1/q2 "source" is based on gnd, so the issue is oat the diode bridge.

Note this is more precisly called a current sink, since that is what the active components are doing.  The 24V  (J2-2)is the '"voltage source", but it could care less about current.

 

The issue is your diode bridge prevent either of those J3 pins tying to gnd.  Can you tolerate half wave instead of full wave--that allows grounding

It silences an ERC warning

You should often be able to turn off individual notices without redesigning parts, though sometimes it is required or the easiest, depending on what is wrong. Many times it just seems wrong to the program.  You may have a design that starts with 300 warnings, but they are looked at one by one and 288 are found to be baloney (you approve those) and you have to deal only with the remaining.

 

Make sure your brick allows this...there are a few odd, very rare ones, where the output must be allowed to independently float.

Usually where they are too cheap to use a transformer (mostly AC models), or have some type of diode offset or other crazy arrangement, maybe a gnd current sensing resistor...so output gnd is not quite at input gnd.

 

I had a meter module like that...the input 9V had to float from the + and - meter inputs. If you tied gnd to the - input kaboom (well, actually no valid readings)

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Wed. Sep 21, 2022 - 09:56 AM
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wijnen wrote:
If not, why are you posting this?
EXACTLY THIS.

 

What is going wrong with Freaks recently. Suddenly everyone is biting the head off every innocent victim that wanders past here.

 

Remember there is just one rule - if you have something useful/helpful to say then say it, otherwise shut up. 

 

Moderator.

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wijnen wrote:

If you want to help me make it better, please do.

If not, why are you posting this?

 

Will do it gladly, you asked for. Eliminate D1-D4, and then we can continue discussion.

 

It will require a polarized connector(s), I presume.

 

 

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grohote wrote:

Will do it gladly, you asked for. Eliminate D1-D4, and then we can continue discussion.

 

It will require a polarized connector(s), I presume.

Consider it done. What other problems do you see?

 

In other news, I soldered some wires to an attiny24a and I could program it just fine. It's starting to look like the attiny2313s that I have here are broken. I'll do some more tests on them though.

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Super, and hope that your AVR knowledge is increased.

 

For other... sorry, it is forbidden to talk further about your schematics (even if provided), perhaps a precedence here, sorry. You know if you deserve it.