I'm more software than hardware, so I'm looking for some advice here. One rule I found at some IC manufacturer was to add 0.1mm to the pin width if the pin spacing was > 0.5mm, but just to use the pin width itself for <= 0.5mm. Comments on that?
This came up in particular because I grabbed from a library a QFP64 footprint for 0.5mm spacing that had the pads at 0.35mm wide, with just 0.15mm between pads. This would be for a chip with a maximum pin width of 0.27mm. That pad width just seemed too wide for me, so I wanted to ask about it.