AVR Freaks

ATtiny828 is about a buck in quantity, and has 28 A/D channels and a true SPI peripheral. 

Attiny441 family is about a buck in quantity, and has 12 A/D channels and a true SPI peripheral.

One of our favourite Tinys around here is the '1634.  Not expensive with a lot of memory and peripherals as Tinys go.  There I'd suggest streaming the date via USART.  But it only has 12 A/D channels.

The question was really "how does SPI work". The truth: nothing more than an externally clocked shift register with an active-low select/enable pin. In a slave, the data input pin is called MOSI (Master Out, Slave In) and the data output at the far end of the register is called MISO (Master In, Slave Out). Look at a 74C164, and you will know almost all of how slave SPI works. The master does most of the heavy lifting (which is not much).

QUOTE:  I even seriously doubt this works in the slave as there is no way to synchronize the bit timing with the clock coming from the master.

Yes, it IS how it works. In the case of a microcontroller, this is often dedicated static logic, not clocked by the internal MCU clock. And, there is something that counts clocks so that the slave knows when its register data has been shifted out. Bit banged slave has a severe limit on the maximum clock rate from the master.

The slave IS responsible for loading the right data at the right time into the register. But, that is about it.

Jim

An avr can read the a/d at  about 20000 reads a sec. So thats 16 channels 1200 times a sec. Sounds do-able on one avr. A much simpler program than 16 spi slaves. But the spi does in fact work. The idea is when you store a byte in the master transmit, the clock shakes 8 times and the byte shifts out. If the clock also goes to the slave, he will shift in his byte while the master is shifting out his. So you can get full duplex at a megabyte per sec.

He wants to know how to do SPI so that he can transmit data from multiple slaves to a single master.

Why are you unsure?

OP also described slave code that suggests he picked slaves without hardware SPI.

Not a good design choice, but does not really change the question.

It does change the answer: Get slaves with hardware SPI.

A multi-processor system might have been a bad design choice,

but that does not render OP's first post any less clear.

Using AVRs might have been a bad choice in itself.

Perhaps a stand-alone 16-channel ADC and a fast enough processor would have been better.

This might be a case of OP using what he thinks he knows.

What AVR has the largest number of simultaneous ADC channels?

No Mega or Tiny AVRs have simultaneous ADC operation. 

There MAY be some such capability in XMega devices.

Jim

If we take 'simultaneously' in the literal sense, the answer may be very much different then if it is taken to mean 'fast round-robin'.
480x16 = 7860 sps. That is well within the capability of an AVR8. At 8 MHz and /64 ADC prescaler, you can achieve 9615 sps at 10 bits. If you only need 8 bits, a /8 prescaler will get you 76923 sps. At that rate, 16 round-robin samples will all be sampled within 200 us, compare to a 2083 us sample period (480 sps).

Were the question valid, a wink would be neither necessary or useful.

We both had the same context available.
What helped was the information provided later in the post.
You did not end with the snark.

Actually you might be better able to answer the question than I:
Other than the obvious, I know little about AVR32s.
OP might be sticking with AVRs because of learning curve issues.
The AVR8 to AVR32 learning curve is something you might know better than I.

It's actually simple. Everything is under control of the master. 

So if you are the master: You assert the desired slave select. Then you load the outgoing SPI data register. The hardware takes over, and generates the SPI clock, and shifts out your going data on MOSI while simultaneously shifting in the slave data on MISO. When the operation is complete, you get an interrupt, or you can simply spin on whatever shift-done indicator the hardware provides. When the shift is done, you can read the incoming SPI receive data register to get what the slave sent.

If you're only writing to the slave, you can ignore what shifts in.

If you're only reading from the slave, you still have to load something in the outgoing data register for the shift operation to start.

That's it.

Paul SPI has been around for more than 30 years, not much more than a shift register, if you don't know how it is supposed to work it's not Atmel's fault but yours for not studying enough at college or uni.

The SPI docs are perfectly fine and I got it working pretty much first go about 16 years ago and in assembler even. Had Motorola SPI working even a lot longer.

And if you keep on reviving old threads we may need to start deleting some of your posts.

Every AVR datasheet (for devices with SPI) has that picture showing the sending and receiving shift registers. Surely that picture alone tells you almost the entire story?

Never leaned one iota about SPI at uni.

Didn't you?  the uni I went to UHK (aka university of hard knocks) had courses on everything and had to learn very fast before the Internet was around, why I even had to read books to which I'm allergic to now.