How to lay out SOT-223 package for good heat dissipation?

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kk6gm
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Posted by kk6gm: Fri. Oct 7, 2011 - 02:46 PM
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This is something I don't know much about. I need to lay out a pcb pattern for an SOT-223 voltage regulator, and I want to allow it to have some "reasonable" amount of board heatsinking. What are the guidelines for doing this kind of thing? Can I make the tab footprint larger without causing problems with reflow soldering? I know I'd need to adjust the solder paste footprint, manually I guess. I gather another technique is to use vias to conduct heat to a similar footprint on the bottom of the board.

Any advice would be welcome.

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Chuck-Rowst
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Posted by Chuck-Rowst: Fri. Oct 7, 2011 - 03:54 PM
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What is the part number and manufacturer of this SOT-223 regulator?

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kk6gm
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Posted by kk6gm: Fri. Oct 7, 2011 - 04:05 PM
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It's an xx1117, many manufacturers.

http://www.national.com/mpf/LM/L...

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leon_heller
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Posted by leon_heller: Fri. Oct 7, 2011 - 04:09 PM
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You could put solder mask over most of it if you are worried about reflow soldering.

Vias to a copper pour area on the other side are often used, you need several of them to get enough heat transfer.

Another option is to use a switcher.

Leon Heller G1HSM

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kk6gm
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Posted by kk6gm: Fri. Oct 7, 2011 - 04:21 PM
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leon_heller wrote:
You could put solder mask over most of it if you are worried about reflow soldering.

Vias to a copper pour area on the other side are often used, you need several of them to get enough heat transfer.

Another option is to use a switcher.


Thanks. This is more of a general question. I know I don't need to go to a switcher, and I'm really just wondering what are the simple things to do to keep any temperature rise to a minimum, using board area that would otherwise go unused. Currently my plan is for a top-layer square pad as wide as the chip, and a bottom layer pad that large or somewhat larger, with multiple connecting vias. I believe that will be more than enough, but I'd like to hear what other, more experienced people do as well.

I found this doc which has some interesting info on heat transfer:
http://www.ti.com/lit/ml/slup230...

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Brutte
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Posted by Brutte: Fri. Oct 7, 2011 - 05:21 PM
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You would like to know how to push it to the limits, or how a thermal resistance of this circuit depends on the layout/Cu thickness/orientation?

From my experience I must say the second question is of greater importance, as typically LDOs work up to Si=125*C (and some modern versions up to 150*C). To utilize all of their features you actually have to thermally isolate them in most cases, than to keep them cooled.

What I mean is that from all of their features, a voltage regulation is typically the least important one - you can use a regular transistor at fraction of the price obtaining similar regulation. It is the thermal shutdown/over-current/power limit protection that really matters (at least for me). So it is advisable to force a shut-down and protect more delicate circuitry (like a uC which operates up to 80*C) than to let LDO reach only 80*C when your uC is crossing 90*C and going slightly mad.

In another words - if you want LDO to be cool, then you do not understand what it was made for.

No RSTDISBL, no fun!

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kk6gm
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Posted by kk6gm: Fri. Oct 7, 2011 - 05:38 PM
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Brutte wrote:
In another words - if you want LDO to be cool, then you do not understand what it was made for.

Hmmm, I doubt I'm the first or only one who's wanted to conduct heat away from a regulator. You make that seem like it's a bad thing. I wonder why they have heat-conducting tabs in the first place?

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Brutte
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Posted by Brutte: Fri. Oct 7, 2011 - 06:01 PM
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kk6gm wrote:
You make that seem like it's a bad thing.

You do not stabilize the voltage supplied to the LDO, you do not limit the current that flows into it and you do not mount a thermal fuse on it.
Why? Because it already has these features inside. I do not know your specific LDO design but that is the typical usage of the LDOs I know.

And thermal pads are used to allow customers to push it to the limits. You can even mount a heat sink on some models (pushing the limits even further).

No RSTDISBL, no fun!

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Chuck-Rowst
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Posted by Chuck-Rowst: Fri. Oct 7, 2011 - 07:23 PM
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kkogm,

What really counts here is how much heat you need to dissipate from the LM1117 package. What is your supply voltage INTO the LM1117? What is the maximum load current? What is the regulated voltage of the specific LM1117 you are using?

There's nothing "wrong" or "bad" about dissipating heat from a linear regulator as long as you are doing it within the limits of the specific device. Heat dissipation is one of the most reliable effects we utilize in electronic circuits. It is about as reliable as gravity & Ohm's Law.

In certain circles of the electronic design community linear regulators have a certain stigma attached to them for various reasons, some founded in science others in personal preference and ideology.

If you answer my questions, I can give you specific advice.

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kk6gm
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Posted by kk6gm: Fri. Oct 7, 2011 - 08:03 PM
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I'll add some detail. I'm familiar with doing the thermal resistance calculations for heatsinks, and calculating the power dissipated in a regulator (voltage dropped X current into). What I'm not familiar with is just the general approaches one takes when using the board copper (top and bottom) as a heatsink. And most particularly, I'm not sure how soldering a part with e.g. a 5mm square tab onto e.g. a 15mm square surface should be done from a manufacturing standpoint. That's why I was wondering about the paste outline - would one typically modify it to just indicate the area under the tab, or not bother about that?

Since my questions are of a more general nature I don't want to get wrapped up in particular math and have people start telling me I don't need any heatsinking, or I should use a bigger part, or any of the other noise that might surface. I'm just wondering what the general rules are.

And yes, I understand that beyond a certain point linear regulators are wasting enough power and generating enough heat that a switcher is dictated. I'm just not at that point. But again, my questions would apply to mounting any type of SMT power device, not just a regulator.

I hope that clarifies the intent of the thread, and thanks in advance for any general wisdom you can impart.

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pnp
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Posted by pnp: Fri. Oct 7, 2011 - 10:22 PM
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kk6gm wrote:
What I'm not familiar with is just the general approaches one takes when using the board copper (top and bottom) as a heatsink. And most particularly, I'm not sure how soldering a part with e.g. a 5mm square tab onto e.g. a 15mm square surface should be done from a manufacturing standpoint.
I faced this issue when I had to design using this regulator. If you please check page 12 you will see that they actually recommend the use of copper surface as a heatsink. In my case, I designed rectangular areas on both top and bottom layers and I stitched them with vias. Then I modified the soldermask to cover everything except the mounting pads. The heatsinking works nicely! Too nicely I have to say, since the board was hand soldered, my 25Watt soldering iron was not powerful enough and I had to use a monster to solder it. I don't even dare to write its wattage here.
kk6gm wrote:
That's why I was wondering about the paste outline - would one typically modify it to just indicate the area under the tab, or not bother about that?
From a manufacturing standpoint, (my logic and not any real experience says that) it shouldn't affect anything. I remember seeing both ways (soldermask covered and not) used in various valume-made boards.

Note: Board copper works nicely as a heatsink, but with my current knowledge I would recommend extra care if it's used in very sensitive circuits, due to the heating of surrounding components and the sideffects of that.

-Pantelis

Professor of Applied Murphology, University of W.T.F.Justhappened.

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hugoboss
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Posted by hugoboss: Fri. Oct 7, 2011 - 11:37 PM
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Here's an example... This is a switching regulator, the datasheet said to give it 6cm2, gave it about 9. I didn't cover the thermal pad with soldermask, since it's ground anyways in this particular case, and I just figured more copper exposure would dissipate better. The actual heat sink area is much larger than 9cm2, as it is part of the ground plane poured over the whole board.

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toalan
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Posted by toalan: Sat. Oct 8, 2011 - 04:34 AM
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For manufacturing, I think it depends on what components are on the board and what method they use to solder. I suppose if all you components have similar solder temp profiles then they will bring the whole board upto temperature in an oven of some type.

I have in the past used a DPAK device with the large pad connected to the top cooper without any breaks. I did not give any specific instructions to my assembly house about it, and they managed to solder it without issues.

For the purpose of heatsinking, it is tough to know how effective using a cooper layer will be. It depends on the enclosure, what components are around it and their consumption, where the "hot" chip is in pcb, is the chip on the top side or the bottom side, etc....

In one of my current projects, I used a 5v regulator in a T220 package, the tab is soldered to the top copper layer without an breaks. I must have been high or something, because I was expecting to heatsink 2.5w worth of heat through the top cooper layer. Well atleast I can rest assured that I am not wasting money when I do a redesign with a switching regulator instead of a much cheaper linear one.

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Brutte
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Posted by Brutte: Sat. Oct 8, 2011 - 08:53 AM
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hugoboss wrote:
Here's an example..(..)The actual heat sink area is much larger than 9cm2

But you have used a pad relief for pins! What is the point in making a heat sink with copper pour and thermal relief pads? Or perhaps it is made because of technological reasons (wave soldering)? Such SO-8 chips can dissipate heat only through their IOs in the typical applications. You can put a thermally conductive paste underneath but what I see is not the case in here.

And why these vias are made with the relief? You do not solder those so I cannot imagine which factor could force such requirement.

No RSTDISBL, no fun!

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hugoboss
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Posted by hugoboss: Sat. Oct 8, 2011 - 03:48 PM
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The relief via's I couldn't correct right away, since there is one global setting in the board editor to use or not reliefs for via's. They are without relief on the gerbers. For the pads I really have no choice to use relief otherwise it is virtually unsolderable (by hand anyways). It is to be noted the datasheet also recommends using relief pads.

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Brutte
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Posted by Brutte: Sat. Oct 8, 2011 - 04:34 PM
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In your design half of the effort was spent to obtain small thermal resistance and the other half to obtain it high to ease hand soldering. There could be problems with wave soldering of such relief-less pads because the solder could be sucked away from the adjacent pins I guess (not necessarily this case, just general rule). But with hand soldering that is a minor problem - you need to use adequate tool (heavier solder tip in this case I guess).

hugoboss wrote:
It is to be noted the datasheet also recommends using relief pads.

Then that must be made because of some reason. Can you give a reference? Perhaps this was made as a wave soldering guideline?

No RSTDISBL, no fun!

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hugoboss
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Posted by hugoboss: Sat. Oct 8, 2011 - 05:31 PM
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Ok correction. The datasheet states using thermal relief pads is preferable at my power usage, for manufacturing reasons. They do say above 800mA or when using reflow soldering avoiding thermal reliefs is better.

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tpappano
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Posted by tpappano: Sun. Oct 9, 2011 - 05:28 PM
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Quote:
That's why I was wondering about the paste outline - would one typically modify it to just indicate the area under the tab, or not bother about that?

I use SOT-223 devices, and I mount them on large copper areas. I suggest confining the paste to the actual device terminal areas. If paste is applied underneath the entire device, during reflow the part may float on the large area of solder under the part's body, leading to weaker connections on the leads and tab from being lifted up off the board slightly.

Tom Pappano
Tulsa, Oklahoma

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kk6gm
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Posted by kk6gm: Sun. Oct 9, 2011 - 06:28 PM
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tpappano wrote:
Quote:
That's why I was wondering about the paste outline - would one typically modify it to just indicate the area under the tab, or not bother about that?

I use SOT-223 devices, and I mount them on large copper areas. I suggest confining the paste to the actual device terminal areas. If paste is applied underneath the entire device, during reflow the part may float on the large area of solder under the part's body, leading to weaker connections on the leads and tab from being lifted up off the board slightly.


Great, that's the kind of info I was looking for. Thanks.

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pnp
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Posted by pnp: Sun. Oct 9, 2011 - 10:25 PM
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tpappano wrote:
If paste is applied underneath the entire device, during reflow the part may float on the large area of solder under the part's body, leading to weaker connections on the leads and tab from being lifted up off the board slightly.

I thought about that as well, but can it actually happen? Considering that solder paste is uniform and a thin layer (if it's applied using a stencil), can the surface tension of the large pad overcome the tension of the smaller pads? Has anyone seen it happening?

-Pantelis

Professor of Applied Murphology, University of W.T.F.Justhappened.

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leon_heller
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Posted by leon_heller: Sun. Oct 9, 2011 - 10:29 PM
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A grid pattern is used on the stencil to prevent that happening with QFN parts. It isn't much of a problem with regulators and similar devices.

Leon Heller G1HSM

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