Does anyone have a general idea of how heavily optimized the ATMega series are? I'm talking in regards to the compile and how dependent the hardware is on the compiler optimizations for performance. As per several of my previous posts I'm trying to develop a gearbox controller, I have 40ms of time per cycle, running my ATMega88PA at 20mhz gives me 800,000 clock cycles per a gearbox revolution, which should be extreme overkill considering I'm doing simple control with only 5 sensory inputs, most of which are optical. However I seem to be having significant speed issues, and issues just getting what I think is basic code to work. I'm wondering if the optimizations are causing some of my woes. I will turn them off and try it to see what happens, but I'm just curious as to how much performance I would loose in doing so.
Joined: Tue. Feb 24, 2009
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