How to choose right capacitor value for crystal.

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Hi freaks,

 

I am a bit puzzled on how to choose the right capacitor value. After googling and cramming as much info as I can, at last I found this piece of guide in ATmega324PB Xplained Pro Schematics. I understand most of basic terminologies used here. Except one thing.

 

To get to the right value of caps, we know that on MCU's datasheet the pin capacitance is mentioned which is 6pF, which they did not use in the formula below.

 

We don't know what is the stray capacitance/track capacitance at this point, but below you see that they found 8.1pF which is (pin capacitance + stray capacitance) after measuring the frequency. How? How did they found the 1.8pF cap value to begin with?

 

 

Coming to actual point which is how to do this procedure correctly?

 

I am using 16 MHz crystal which has 20 pF load capacitance with ATmega324PB on PCB, where I am using 22pF capacitors for crystal.  

 

Using the formula

Ce = 2(CL - Ci - Cs)

Ce = 2(20pF - 6pF - Cs)

 

How to find Cs? Above you see they say Cs can be ignored if it is less than 1pF, but what if it is not? On other sites I found people guesstimate this to be 5pF. Like here - Even using a ballpark Cstray plus good layout should give you far more accurate results than just copying and pasting a value

 

What I am thinking is can we find the stray capacitance by measuring the actual frequency with (presumably wrong size) 22pF capacitors for crystal? By using the CKOUT fuse I can measure the frequency with oscilloscope on the output pin without effecting it. 

 

What do you guys think? If you had to do it at this level. How would you do it?

 

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“Everyone knows that debugging is twice as hard as writing a program in the first place. So if you're as clever as you can be when you write it, how will you ever debug it?” - Brian W. Kernighan
“Perfection is achieved, not when there is nothing more to add, but when there is nothing left to take away.” - Antoine de Saint-Exupery

Last Edited: Sun. Aug 22, 2021 - 12:16 AM
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I have always just used what is recommended....almost....

 

When I started to use AVRs the recommended cap was 18pf I think but I had hundreds of 15pf caps that were used with the 68HC11 boards so I have been using that for 20+years. No disasters with around 30,000 boards.

John Samperi

Ampertronics Pty. Ltd.

https://www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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My understanding is that load capacitance filters the higher fundamentals. The crystal has more than one fundamental frequency at which it can be excited.

 

https://en.wikipedia.org/wiki/Fundamental_frequency

 

Another way to think of those capacitors is that they reduce the gain on the higher fundamentals, so only the desired oscillation is amplified.

 

Too much capacitance or a reduced amplifier gain could prevent the oscillation from starting. I have never considered what added fundamentals might do, maybe strange timing results.

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Heisen wrote:
How would you do it?
Bail

J202

Strap for testing crystal safety factor

Maximal power transfer occurs when source impedance is equal to the load impedance (crystal oscillator's amplifier, crystal is the load) but the source impedance is dependent on temperature (so, enough oscillator amplifier gain margin at room temperature)

Trim capacitors for fine tuning the frequency, if necessary, given the selected crystal among a set of crystals.

 

STANDARD-PAS-SVC ABRACON | Mouser (PAS - Pierce Analyzer System)

 

"Dare to be naïve." - Buckminster Fuller

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the capacitors serve two functions:

 

1) Crystals are tuned to a specific frequency during manufacture. The test fixture has a certain capacitance (that appears in parallel with the crystal). That capacitance effects the actual frequency of the circuit with the crystal in it. So, to make the oscillator frequency to be within the specified error range, you need capacitors.

 

2) The oscillator (the active part inside the MCU) is designed to work with capacitance on the output pin and capacitance on the input pin. 

 

Now for the details. The NET capacitance seen by the internal MCU oscillator consists of several parts:

 

a) The pin capacitance. This is the capacitance of the internal chip traces, the wiring to the pin, and the physical pin. For common ICs, this ranges from 7 pf (DIP package) to 4 pf (LCC chip carrier packages).

 

b) The PCB trace capacitance. This depends on the width of the trace (more C if wider), the length of the trace (more C if longer), the board thickness to the next traces or ground plane under or over the trace (thinner makes more C). For 10 mil (0.25mm) traces on the order of an inch (2.5cm) long on ordinary double sided board without a ground plane under the traces, figure 2-3 pf per trace. 

 

c) Solder pad capacitance. If using through hole technology on both the IC and the crystal, add 1-2 pf for the pair of pads at each end of the connecting trace. For SMD, it may be half that.

 

d) Physical capacitors. Value should be known.

 

Assuming same geometry at each end of the crystal, the four capacitances at each end of the crystal add together at each end.  The resulting two capacitors appears as if connected in series across the crystal. Thus, you should have (for minimum frequency error):

 

Cpar = (Cpin + Cpad + Ctrace + Ccap)/2

 

What happens if you use a different capacitance? The oscillator frequency may differ, slightly, from the crystal's calibrated frequency. If off by a few pf then the probable shift is generally at the ppm level. Remember. initial accuracy with "correct" capacitance is often 50ppm or more. For an 8MHz crystal a 1 ppm error is 8Hz. If the capacitance error is more than, lets say -8pf or +15pf. the oscillator may not even generate a regular or steady clock.

 

So, the short answer is that if you are off by a few pf, nobody will know the difference in most applications.

 

Hope this helps

Jim

 

Until Black Lives Matter, we do not have "All Lives Matter"!

 

 

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ron_sutherland wrote:
... or a reduced amplifier gain ...
Enough gain means increased transistor area (oscillator only) and increased current; easier are internal oscillators then sync (some USB UART will generate an accurate clock signal due to USB SOF, biphase coding)

 

Abracon-18pF-Crystals-May-Not-Oscillate-With-Energy-Saving-MCUs.pdf

[middle of page 2]

Ideally, for robust oscillations in a real-world environment, the goal is this ratio [gain margin] to be greater than five.

up to 24 MHz (match for AVR Dx ... huh ... AVR DC?) : USB UARTs - MaxLinear

Advanced Examples | Getting Started with Configurable Custom Logic (CCL)

 

"Dare to be naïve." - Buckminster Fuller

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Thanks for info guys.

To the future reader, adding to what  ka7ehk said in #5

I learned that there is no way to find the true Cstray capacitance. Easy way is to measure the crystal frequency on clock output on PB0 pin with a 6 digit frequency counter. Which will tell you the +/- ppm deviation, compare this with actual ppm in the crystal datasheet.

 

If the accuracy matches with what's written in the datasheet, the cap size are okay.

If it does not then adjust the cap size, repeat the test again until the right value is found.

 

Of course the best value of the Capacitor is where you have the least amount of +/- PPM.

 

The answer is trial and error.

 

Source :- https://youtu.be/cygasKvdbP8?t=195

 

“Everyone knows that debugging is twice as hard as writing a program in the first place. So if you're as clever as you can be when you write it, how will you ever debug it?” - Brian W. Kernighan
“Perfection is achieved, not when there is nothing more to add, but when there is nothing left to take away.” - Antoine de Saint-Exupery

Last Edited: Sun. Aug 22, 2021 - 12:32 AM
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When I was very young and started to study electronics I would go crazy trying to calculate the exact value of resistors, caps etc. for amplifiers or other circuit only to discover that the calculated value parts were NOT made but jumped by some standard percentage, so near enough is good enough.

 

ie for crystal caps you may have 12pf, 15pf, 18pf, 22pf, 27pf, 33pf. So one needs to learn to live with real life values.

 

 

John Samperi

Ampertronics Pty. Ltd.

https://www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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Heisen wrote:

I learned that there is no way to find the true Cstray capacitance. Easy way is to measure the crystal frequency on clock output on PB0 pin with a 6 digit frequency counter. Which will tell you the +/- ppm deviation, compare this with actual ppm in the crystal datasheet.

 

An easier and cheaper way is to use a cigarette packet.   It is what they were designed for.

You just use "rule of thumb" "typical" values for pcb and stray capacitance.

 

As Mr Samperi has noted,  electronics uses a small range of wide tolerance components.  e.g. E5, E12 series of preferred values.

 

10% tolerance for a resistor or 20% for a capacitor  was normal for components.

But something like hFE on a transistor might range from 40-200.

 

If you really need 10ppm F_CPU you will design accordingly.

Anyone else is happy with 50ppm using standard parts.

 

David.