What are the advantages of High-voltage Programming ?
1) Chip doesn't need to have its own clock running during programming, so you stand a chance to access it (again) even if the fuse bits may have been set for the 'wrong' clock source.
2) Accessing the chip even if ISP functionality is turned off.
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3) I believe it can be faster due to the parallel nature
4) Probably more suited to large production & gang-programming than serial
Thank you andreas !
But why does it needs a higher voltage-level ?
+12V on RESET will at least tell the chip's logic that you want to use "parallel programming" (which actually is more commonly used to describe this mode than the "high voltage programming" tag).
I don't know the design of Atmel's internal EEPROM programming circuit - the +12V on RESET *could* also be used as a "true" programming voltage (could be a *little* higher than the internally generated standard programming voltage) to speed up tunnelling electrons into and out of the bit cell's floating gates (in addition to  in Lee's post above).... but that's pure speculation and actually, if you raise the programming voltage too much tunnelling electrons through the insulation quickly changes to drilling holes into the silicon which won't be good for the EEPROM's life expectancy.
In the days before charge pumps (to produce the programming voltage required) were integrated on the chips "high voltage" (= higher than normal VCC) always had to be applied externally (= Vpgm, "programming voltage" etc.).
> I don't know the design of Atmel's internal EEPROM programming circuit - the +12V on RESET
> *could* also be used as a "true" programming voltage
Could, but isn't. The 12V is a programming mode enable only, and does not affect the internal high voltage.
Before i get killed :)
> ... charge pumps integrated ...
Technically implemented as FGMOS transistors with multiple control gates coupling capacitively into the floating gate thereby allowing injecting/extracting the charge at considerably lower voltages than in the classic designs ("neuron MOS transistor", Shibata and Ohmi 1992)
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