## FMULS confusion

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Hi,

Take a look at this paragraph extracted from the description of FMULS in Atmel's AVR Instruction Set document (rev. G):

Quote:
The multiplicand Rd and the multiplier Rr are two registers containing signed fractional numbers where the implicit radix point lies between bit 6 and bit 7. The 16-bit signed fractional product with the implicit radix point between bit 14 and bit 15 is placed in R1 (high byte) and R0 (low byte).

This confuses me slightly. Surely, for 8-bit signed fractional numbers, the radix point lies between bits 5 and 6 (bit 7 being the sign)? For 16-bit signed fractional numbers, the radix should lie between bits 13 and 14 (bit 15 being the sign). Am I wrong about this?

Matt.

Isn't the absolute value of the fractional number always less than 1? That would place the radix point where the documentation says it is.

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Isn't the absolute value of the fractional number always less than 1? That would place the radix point where the documentation says it is.
Well, this is partly what I was confused about, but having found this sentence in AVR201:
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Signed fractional numbers, like signed integers, use the familiar two’s complement format. Numbers in the range [-1, 1> may be represented using this format.
...it would seem you are right and I now know what is going on. Cheers.

Matt.

Quote:

it would seem you are right

I was half-right. The range description means that the highest fractional number is less than 1, but that the lowest is exactly -1. Which is quite natural (no, no pun intended) given that the representation scheme is the same as for two's complement integers.