flags are cleared(0) when writing (1) or not?

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We saw something odd when we were trying to clear a specific flag(OCF3A) in the ETIFR in ATmega128.
We wanted to discharge this flag in order to destroy any floating interrupt caused by this flag, so we were writing logic 1 whatever the flag was. In AVRStudio ver4.07 build240 it seems that when the flag is cleared(0) and we write a logic 1 to it, it becomes 1.
Normally, it should stay logic 0, right?

In the datasheet(page 139) it says that when is set, it can be cleared by writing a logic 1 but what happens when it was clear before the writing(1)?

Do we have to check first if it is set and then try to clear it or else do nothing?

It's possibly another AVR Studio bug but it might be because of the oddity of the ETIFR since it's in SRAM address $7C and needs to be accessed as SRAM with "sts", "lds" and their 'relatives'.

If it's because of the SRAM addressing, do the other 'SRAM' registers have the same problem?

So what's going on?

Kyriakos

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Having played about a bit in this blind alley if an interrupt flag is cleared and you write a logic one to, to clear it, in the real device it stays cleared.

I suspect we are dealing with an RS latch the interrupt source hits the S and the reset source hits the R. One reason for my suspision is that an interrupt can be latched even if the interrupt is present for a time period of less than one clock pulse.

Mike

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So all flags work the same way no matter the address the corresponding register has.

Thanks Mike for the feedback.

Kyriakos

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No not all flags

If you consider the interrupt enables as flags then that is a 1 to set and 0 to clear what I am thinking about is just the interrupt detected flags.
Mike

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No, when I say flags I mean those who become set(1) by hardware when an interrupt get triggered.

Kyriakos

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