External SRAM with ATMega32A

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Hey folks,

I am planning a project that will utilize an ATMega32A in order to write to an HM6264 external SRAM. I've seen a few posts on this, but nothing that really deals with my use scenario.

I will actually be manually writing a 6502 program to the RAM, and then when it's done switching on the 6502 MPU in order to run the program. My 6502 MPU is newer and can tri-state the address and data bus so this won't be an issue. The AVR will also be used to provide clock, and reset signals to the 6502.

The 6502 is, of course, hooked up to the SRAM and a SID chip in order to run the program (which happens to be a SID file). This is going to be a SID player. I'm using CPLD for address decoding once the 6502 starts up.

It's going to be a big learning experience for sure.

Does anyone know if it's better to utilize the AVR external ram functionality to write to the RAM, or should I just write my own code in order to write the data?

Any suggestions or comments are welcome!

I should mention that I am modelling this project after Nicholas Fitzroy-Dale's hardware SID player here: http://code.lardcave.net/entries...

Thanks

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Umm the mega32 does not have an external memory bus? I guess you could fake it by driving port pins but wouldn't it be easier to pick an AVR with an SRAM interface?

These micros (maybe others?) have external memory interface:

C:\Program Files\Atmel\Atmel Studio 6.0\extensions\Atmel\AVRGCC\3.4.1.95\AVRToolchain\avr\include\avr>grep -w SRE io*.h
io4414.h:#define    SRE          7
io8515.h:#define    SRE          7
iocanxx.h:#define    SRE         7
iom103.h:#define    SRE          7
iom128.h:#define    SRE          7
iom128a.h:#define SRE     7
iom161.h:#define SRE    7
iom162.h:#define SRE    7
iom32u6.h:#define SRE 7
iom64.h:#define    SRE          7
iom64a.h:#define SRE     7
iom8515.h:#define    SRE          7
iomxx0_1.h:#define SRE     7
iousbxx6_7.h:#define SRE     7

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The ATmega32A can NOT access an external memory bus.

Obviously you can bit-bang the GPIO ports to control external memory that way. Yes, you can effectively 3-state GPIO pins if you want to.

If your 6264 is connected to the 6502 in the regular way, you need to access the 6264 when the 6502 is not active.

Do you want to simply upload data to the 6264 as a one-off?
Or dynamically access it when the 6502 is not looking?

David.

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You will be able to read and write data BUT you will not be able to execute code from that space. You COULD read 6502 code and "interpret" it.

If you try to do this with a device that does not have a built-in memory port, the accesses will be quite slow. I could easily see 10 clock cycles to do a read, maybe more. Each change in the state of any memory control line will take an executed instruction.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Quote:
You will be able to read and write data BUT you will not be able to execute code from that space. You COULD read 6502 code and "interpret" it.
He doesn't want to run the code within the AVR, he has an actual 6502 to do that.

Regards,
Steve A.

The Board helps those that help themselves.

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Lee, the concept of 'slow' is relative - the 6502 does a bus cycle in 1us, so the AVR should be able to get close to that. Bit bashing the bus shouldn't be too difficult - there's addr,data, E and r/w. 26 bits in all.

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Thanks folks.

Just to clarify, I am going to write once to the SRAM and then the AVR will not touch it again.

So the entire time I'm writing to the SRAM the 6502 will be disabled, it doesn't really matter how long it takes (at least that's what I think!) -- it shouldn't take too long as it's not going to be more than a few kilobytes anyway.

Also, the only time I will want to read from the SRAM is in debugging to make sure my write routine is working ;)

The data will come from a PC via serial port, to the AVR the AVR will take it, write it to the SRAM and then turn on the 6502 to do it's thing. After the program has finished it will either start over or I will reset it and send a new program (SID file).

Hrm. So would it be _easier_ to do it with an AVR that has an external memory interface? Or just easier to bit-bang it? I am leaning towards bit-banging -- because it seems pretty simple to do, in theory anyway... which is why I posted ;)

Thanks again. I am constantly impressed with how helpful everyone in this community is!

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Yes, you can bit-bang all the address and data lines.

Since your 6502 will have its own ROM, I would simply add a 6502 function to talk to the AVR by SPI, I2C, UART or even 8-bit parallel.

But then, I prefer using 1 wire or 2 wire comms to all those address and data lines.

The 6581 has an Extern In pin that could be used as a UART RXD pin. Or perhaps you add a 6551 UART or 6522 Multi-IO chip.
Or perhaps make a GPIO pin from your spare logic gates.

David.

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Quote:

So would it be _easier_ to do it with an AVR that has an external memory interface? Or just easier to bit-bang it?

It'd be something like the difference between:

void write_RAM(uint16_t addr, uint8_t val) {
 *(uint8_t*)add = val;
}

on an AVR with an external memory bus compared to:

void write_RAM(uint16_t addr, uint8_t val) {
  PORTB = addr & 0xFF; // low part of address
  PORTC = addr >> 8; // high part of address
  PORTD = val; // byte to be written
  PORTA = (0 << CE2) | (1 << CE1) | (1 << WE);
  PORTA &= ~(1 << WE);
  _delay_us(N); // may need delay here?
  PORTA |= (1 << WE);
  PORTA |= (1 << CE2);
  PORTA &= ~(1 << CE1);
}

or something like that (I just had a brief skip through the 6264 data just to get an idea of what signals are involved in driving it).

Obviously you only have to get this write_RAM() routine right the once and after that if you really don't care how long it takes to fill the SRAM then I guess it makes little difference whether it's the one line or 10 line version. It's just the SRAM interface on an AVR with external bus will do all the "wire wiggling" for you - less thinking involved.

(software engineers are always in favour of less software and a hardware based solution while hardware engineers are in favour of less hardware and let the software engineers sort it out. I'm a software engineer ;-))

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david.prentice wrote:
Yes, you can bit-bang all the address and data lines.

Since your 6502 will have its own ROM, I would simply add a 6502 function to talk to the AVR by SPI, I2C, UART or even 8-bit parallel.

I actually don't plan to use a ROM at all. The idea is just to write the program to the SRAM and then pass it over to the 6502 to run. When I want another song on there I will simply use the AVR to hold the 6502 reset down, re-write the SRAM with a new program and then let it go...

So the AVR and 6502 shouldn't need to talk at all... Hopefully. I'm a noob with this stuff so I am trying to keep it simple for now!

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Ok, I wondered about that. This means that you might just as well bit-bang the whole uploading procedure. When done, you put all the AVR lines into 3-state and release the 6502 from reset.

You have plenty enough GPIO lines in a mega32A.

Just how clever is the SID chip? A mega1284P has got plenty of PWM and plenty of Timers. Can you not play several voices just with the AVR?

All the same, I do have a great nostalgia for the 6502 chip. I might even dig out an old Mitsubishi 740 dev board ! This was an MCU with extended 6502 instructions and some primitive peripherals.

David.

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david.prentice wrote:

Just how clever is the SID chip? A mega1284P has got plenty of PWM and plenty of Timers. Can you not play several voices just with the AVR?

All the same, I do have a great nostalgia for the 6502 chip. I might even dig out an old Mitsubishi 740 dev board ! This was an MCU with extended 6502 instructions and some primitive peripherals.

David.

As I said, I'm pretty green here -- but from what I understand the SID basically needs the 6502 (or 6510) to work. SID files are 6502 programs that utilize the SID. I've heard that any emulator out there basically has to emulate a 6502 and SID in order to play the file.

When I get more in to this project I'm sure I will figure out a lot more, I'll be sure to post then.

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I just did a quick Google "6581 data sheet".
The SID chip is a lot more clever than the AVR.

The AVR can do 3 oscillators but the 4 waveforms would need some software intervention. I am sure that a 20MHz AVR can manage this but is obviously not as good as SID hardware.

No, you don't need a 6502 to talk to a 65xx peripheral chip. You can either bit-bang the signals from a regular MCU or use an AVR with a external memory bus.

I would guess that your SID "program" is just a few 6502 housekeeping subroutines with a big table of data.
You can write equivalent housekeeping routines for any MCU with the same data table.

It is not a subject that interests me, but I am sure there will be many enthusiasts out there. Google is your friend.

David.

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Quote:

I'm using CPLD for address decoding once the 6502 starts up

I assume that the mega32A don't do anything after you have released the 6502, so I guess the AVR can do the CPLD job in SW!

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sparrow2 wrote:
Quote:

I'm using CPLD for address decoding once the 6502 starts up

I assume that the mega32A don't do anything after you have released the 6502, so I guess the AVR can do the CPLD job in SW!

I originally was thinking of doing it this way but was concerned that it might not be fast enough.

If it is fast enough it would be really great if I could bring the whole computer down to four chips, AVR, RAM, SID and 6502.... that would be a fun little board to design.

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david.prentice wrote:
I just did a quick Google "6581 data sheet".
The SID chip is a lot more clever than the AVR.

The AVR can do 3 oscillators but the 4 waveforms would need some software intervention. I am sure that a 20MHz AVR can manage this but is obviously not as good as SID hardware.

No, you don't need a 6502 to talk to a 65xx peripheral chip. You can either bit-bang the signals from a regular MCU or use an AVR with a external memory bus.

I would guess that your SID "program" is just a few 6502 housekeeping subroutines with a big table of data.
You can write equivalent housekeeping routines for any MCU with the same data table.

It is not a subject that interests me, but I am sure there will be many enthusiasts out there. Google is your friend.

David.

Very cool. I was led to believe otherwise. I will soon begin to take a closer look at the SID programs to see what they really do, and suppose I'll see first hand!

It would certainly be very awesome to directly interface the SID with AVR.

The other cool thing about this chip is it's analog output. I'm excited to hear it again, the C64 was the computer that started it all for me...

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Quote:

I originally was thinking of doing it this way but was concerned that it might not be fast enough.


Then I would look into a Mega1284 and let it emulate the 8K RAM

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sparrow2 wrote:
Quote:

I assume that the mega32A don't do anything after you have released the 6502, so I guess the AVR can do the CPLD job in SW!

Just wanted to follow up on this.

I don't think I can use the AVR to do address decoding in software. Even if I clock it at 20Mhz, that means I get one instruction every 50ns. The 6502 will be running at 1Mhz, I am told I need to decode the address within 500ns.

This is very tight. I think it's better to just use a CPLD -- although I would really like to reduce the chip count. If someone has any light to shed on the matter I would appreciate it!

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I bet that our SID program is nothing more than a table of SID register values. You load a new value every 100ms or so. i.e. whenever the note changes.

You have plenty of time to control the SID registers. In fact you will probably have to be careful not to do things too fast.

David.