External Oscillators, Signal Amplitude, 25MHz, (AD9833)

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As I stumble my way through an "RF" project I keep coming up with more questions than answers.

"Simple Project", a simplistic, (i.e. Hobbist grade), signal generator using the Analog Devices AD9833 chip, (0-12.5MHz, Sin, Triangle, Square Waves).

I'm running my ATMega168 at 5V, LCD at 5V, and hence SPI bus is also at 5V.

I'm running the AD9833 chip at 5V to match the above.

I ordered some 25 MHz external Osc from Jameco, 1/2 can, TTL, 5V units. Turns out, reviewing their data sheet, they are 3.3 V units. :(

I called Jameco, they acknowledge that both their web page, and the catalog are in error.

So, I check their full can oscillators, 5V units, and it turns out they are also 3.3 V units, with the web and catalog again being in error.

So, I go to Mouser, find several 25 MHz, 5 V Oscillators. This one, for example: #520-TCH2500-X, by ECS Inc, is listed as 5V, and the data sheet says 5 V. So far so good.

The output waveform, however, lists a minimum High of 2.4 V, (on a 5V supply). The AD9833 lists, under logic I/O, (There is no separate listing for the clock signal), that the Minimum, High, Input is 2.8 V, when running at 5V.

Even if I use a "true" 5V ext osc, running In Spec, it could have insufficient drive for the sig gen chip.

So.... Any words of wisdom or experience and insight to be offered?

I'd like to just tie the ext osc to the chip and hope there is enough leeway that it works, BUT I hate designing out of spec, especially when I don't have enough experience in this area to know what latitude is reasonable.

I'd hate to put a 1 transistor amlifier/driver on the board, and I really don't want to switch to a 3V design.

Any thoughts?

JC

Edit type, and: So do the Logic Input levels apply to the External Clock Input pin?

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JC -

The spec sheet of the AD9833 says that the max guaranteed high output is 0.65V and the max guaranteed low output is 38mV. But, that might not be the output you are talking about.

Most 5V clock modules adhere to the old TTL specs. That is, around 2.4V high, etc. I read the AD9833 logic input spec, which, absent anything to the contrary, I would use for the clock, says that it wants 2.8V.

I guess to be absolutely safe, I would run it through a CMOS buffer. One of those Fairchild one-gate buffers would work well. But, then, if you are not going to use it outside at -20C, it might be OK.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Since years I collect quarz-oscillators
(from old graphic cards and so on). Most
of them deliver a nice 5V signal, but sometimes I
have one with a lower amplitude, probably
still in accordance with TTL spec. So I learned
to watch out.

I think if you go for a CMOS/TTL compatible type
like:

http://www.hosonic.com/pdf/frequ...

it has enough amplitude. Datasheets says
low<0.1*VDD and high>0.9*VDD. That should do it.

And I just checked the site of my local supplier
(in German): The types I order usually are "TTL/CMOS"
compatible and have a guarantied swing from 0.5V
to VDD-0.5V.

Last Edited: Mon. Aug 11, 2008 - 10:02 PM
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Hi Jim,

Wow, thanks for taking a look, and so quickly!

Yes, my question centers around the external oscillator which drives the DDS chip, not the output from the DDS chip itself.

Guess I'll add a buffer chip. Much easier than (me) adding a 25MHz transistor driver.

How about a follow up question? If the signal from the osc buffer chip is traveling several inches across a board, to the DDS chip clock input, do I need to put a termination resistor at the DDS chip clock input pin?

I certainly appreciate your insight!

JC

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Hello Ossi,

Wow. That is the kind of spec I expected to find, and was suprised when I found a much lower signal level on the ones I looked at.

The model that you pointed to will meet the spec's without any additional driver. I'll look around for a small quantity source.

Thank you very much!

JC

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My 2 cents for transmission lines
and terminations:

If something is mall
(geometrically) compared to the wavelength (in
that medium) you can neglect wave-propagation and use
lumped elements (L,C) for description.

If you have 100MHz wavelength in air is approx 3m.
Wavelength on PCB will approx. 0.5*3m, so still
1.5m. So a few inches are small compared to
wavelength.

So the PCB-wire may be modeled by its inductance
and capacitance. The oscialltor-chip normally
is strong enough to drive the capacitance, and the
inductance is really small. So no termination
needed, but there might be a small delay.

(Just my 2 cents ! I am not a HF/RF expert !!!)

Added after reading last post:
I am astonished that it is hard to get a CMOS
compatible oscillator. If I go into the
local shop I usually get such a thing, even if
the salesman does not know about it !

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If this is a hobby project, as it seems, I would not worry about termination. I would consider adding a 4.7ohm (smt) resistor somewhere in the line. This will reduce reflections without seriously altering amplitude. The biggest effect I have seen is low-level EMI at clock harmonics and at the signal frequencies you are working with, it ought not to be a problem.

If this is a "clipped sine" oscillator, there should be no problem at all.

If this is going to be used around RF hardware, I would put it in a diecast metal box with a good coax connector, good filtering on the power and suppressor beads on the data inputs.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Hello Ossi and Jim,

Definitely a Hobby project, HP has nothing to fear.

I'll put a 4.7 ohm in series, in the line, NOT tied to ground.

Although I'd like to learn more about RF, and perhaps tinker with a 400HMz to 100 MHz down converter, that project will be well into the future. This project is just a simple signal generator for my bench top tinkering. It won't be part of a transmitter or receiver.

Again, thank you for the guidance!

JC

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You need to be a little careful about how you assess the usefulness of that series resistor. Looking at it with an oscilloscope adds C and slows everything down a little compared to without a scope.

I suggest this solution because it has saved my behind several times when using a single clock for several chips and EMI testing found radiated clock harmonics. A knife and a resistor and a soldering iron revealed, more often than not, that radiated signals were reduced. It rarely hurt.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Hello Jim,

I already added it to my schematic, and added a comment about it in my project's notes. I appreciate being able to put your experience to good use in my circuit. :)

Go figure the first half dozen osc modules I looked at were either inaccurately posted, or not full-swing output. Following Ossi's post, and renewed hope, I found a Mouser Vishay unit, in stock, that ought to do the job. Full swing output, no buffer required!

JC

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Hi Doc,

Several years (2004) ago I purchased one of the following:
http://kitsandparts.com/avr-dev.php

And more specifically:
http://kitsandparts.com/avr-sch2.htm

I saw it at the Dayton Ham-fest and just had to have one. I mean, 1.0Hz to 20.000MHz - that was really cool!

In fact, it was because of this purchase that I got into the AVR family of micro-controllers. When I programmed the controller, and saw how easy it was comparing to programming and debugging an HC6811E2, I was convinced that the AVR was the controller I wanted to move to.

Anyway, it has about 1/2 volt P-P output.

Though it doesn't incorporate an output amplifier, I was thinking that the schematic for it would give you some ideas about the clocking of the Analog Devices DDS IC.

I hope this helps a little bit, even though there's noting about the output amplifier.

EDIT:
Also, have a look at this output amplifier:
http://kitsandparts.com/potluck/view.php?id=17
The author claims flat response from 100Hz to 30MHz.

You can avoid reality, for a while.  But you can't avoid the consequences of reality! - C.W. Livingston

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Hi Carl,

Always good to hear from you. Sorry about the recent CPU crash(es). I have Norton on my computer, AVG, (Free Version), on my wife's computer. Kind of a controlled study to see how they do.

Thanks for the link, I'll have to look through that site some more. I see they tied a 50 MHz Osc module to the AD chip's clock input, without any other components involved.

I'm going to add Jim's suggested series resistor. I originally had a 50 ohm termination resistor at the AD chip's clock input, now gone from the circuit.

The scary thing about being a novice at RF is that one doesn't even begin to know all the little things that can go wrong... The osc is 25 MHz, practically DC compared to today's electronics, but a starting point for my tinkering.

The link you posted to had one heck of a filter on the AD chip's output. 1 R, 2 coils, and 6 caps! Oh man, gone are the days of testing it all on a bread board!

I've drawn up a tentative circuit to take the ~0.5 V P-P, 0-12.5 MHz, sin/tri/square signal and provide for both an adjustable gain, and DC offset.

You, Jim, Ossi, and others are welcome to look at it, but I think you would die laughing, and your red pens would run out of ink prior to finishing your mark-ups and corrections.

Good think it isn't my day job, but I'm having fun learning, and trying not to smoke too many chips in the process!

JC

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Hi again Doc,

So, though I have a Ham radio license (I'm only a no-code technician,) I do almost nothing with RF, in terms of radio. I've gotten all of my high frequency experience from the days when I was working with 100MHz and 200MHz Emitter Coupled Logic (ECL). There, every input and every output is 50 Ohm impedance. And every circuit board trace is, in effect, a transmission line. And in fact, at those frequencies, ECL looks and acts more like analog, rather then digital.

I'd like to get more involved in pure radio RF, but I haven't even picked up a radio in about 3 years. I suppose I should get back into it - but it's just another distraction from the "End Goal ." Just what was that "End Goal ," anyway? I just can't seem to remember anymore, it's changed so many times.

So, no dripping Red ink out of any of my handy-dandy mark-up pens. I'm sure that anything I've made could get the same sort of critical review, as well.

I'm glad to see that you are making some progress on this project.

And, I'm glad that your commitment to the ER room doesn't keep you from the passion for electronics and embedded design, which you seem to show so much enthusiasm tward.

Have a great week!

You can avoid reality, for a while.  But you can't avoid the consequences of reality! - C.W. Livingston

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Hi Doc!
This is my project for ad9834. May be help you.
VMLAB prj included.

Attachment(s): 

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For TTL to CMOS level conversion, just tie a pull-up resistor from the oscillator output to Vcc. TTL outputs can sink much more current than they can source, hence the poor Vhigh spec. Adding the resistor takes care of all that, at the expense of a little more power drain.

If you think education is expensive, try ignorance.

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Carl commented:

Quote:
And, I'm glad that your commitment to the ER room doesn't keep you from the passion for electronics and embedded design,

I enjoy working the ER, but it is good to have an interest or two outside of medicine!

Zauberer,

Wow! Thanks for the code. My goal is to write it in Basic, but it is great to have a working example for reference when questions pop up. I appreciate your sending it my way.

Emuler,

Thanks for the tip! I've found an osc module that has a "full swing" output, and hence won't require an additional interface / driver to drive the AD9833. Otherwise your solution would be easy to impliment!

Thanks again, everyone!

JC

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DocJC -

Here is a problem you MIGHT run into. Its called "residual FM" or "phase noise". Some clock sources are worse than others. The ones intended for microprocessor clocking are often less clean in this regard.

If the clock source has "jitter" (that is, cycles are not exactly the same), the result is an apparent frequency modulation. In the case of a phase-locked loop (which you DON'T have), this clock jitter is multiplied by the same factor that the output frequency has to the reference.

In the case of a DDS, I would have to think about the consequences of clock jitter. I suspect that it also gets multiplied by the ratio between the clock frequency and the output frequency, But, in the case of the DDS, with no internal clock multiplier, this ratio is always less than 1, and usually much, much, less than one. If this is the case, then you should have very little residual FM.

About 10 years ago, there was a slew of new radios out that used DDS for frequency control. They got a rather poor reputation because of noise on each side of the carrier that interfered with nearby stations. I don't know if the device you are using is any better in this regard, but it IS something to be aware of.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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The main disadvantage of DDS frequency synthesis is that it produces quite a lot of phase noise. So the phase noise of the clock source is probably not a problem, except if there is something realy wrong with it.
For a stable clock, the supply voltage should be pretty stabe. Vcc to the oscillator should go through a filter (LC or RC) and the decoupling capacitors at the oscillator should have low TC. This means not a 100nF X7 or Z5 type, but better 1nF NPO and a 10 nF film type.

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With respect to phase noise I would really like KKPs
comment on it.

I think DocJc will not have to worry too much about
phase noise in his application (it's probably not
high end receiver design). And I think a cheap
crystal oscillator with a DDS makes a pretty good
oscillator these days. It's quite hard to do better
if you don't have the necessary measurement equipment.

@DocJC
I think we like it very much if we can help you
with these kind of stuff. When we come to age, we
will seek your medical advice !

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Jim,

Thanks for the heads up on the jitter induced FM modulation. My old Heathkit AF and RF signal generators died long ago, and I suspect, (hope), this will outperform them. As I don't have a spectrum analyser I will be oblivious to how much noise my signal really has :) I do recall seeing several external oscillator modules which listed that they purposefully Had jitter, to improve their EMI performance, (spread it out a bit, if the uC doesn't care...). Your caution to be aware of this as a possible source of noise/FM modulation/spectral impurity/... is well noted.

Kleinstein,
I've been reading application notes and tutorials on DDS for several months, and I think it was this month's Circuit Cellar that also had an article on DDS principles. I'm learning that there are many possible sources of noise, it is definitely not a perfect system for signal generation, but it is still very cool from a technical perspective as to how it works. I'll look again at the bypass caps I had planned on using!

Ossi,
Your right, I'm intending to use this to tinker with on my bench, not as the core for a radio. It's also just a good project to help me learn some new things, (RF, SMT, etc.).

Ossi, Stay Healthy :) , prevention is the best medicine!

JC