We are interfacing our AVR1281 with an FGPA using the external memory bus. We route the CLK0 to the FPGA as clock source.
According to the datasheet (AVR1281):
Note that the XMEM interface is asynchronous and that the waveforms in the following figures
are related to the internal system clock. The skew between the internal and external clock
(XTAL1) is not guarantied (varies between devices temperature, and supply voltage). Conse-
quently, the XMEM interface is not suited for synchronous operation.
My question is (regarding the quote above), can we use the CLK0 (not the XTAL1 directly) to sync the external memory bus interface or is it safer to leave it as async?