extended I/O map in Atmega48 and simulation question

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Simulation doesn't show any activity at timer/counter2 and timer0 doesn't enter to overflow interrupt.

This is taken from the datasheet:

For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically
“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.

...and the code I wrote:

lds temp, 0x00	; normal mode
sts tccr2a, temp

lds temp, 0x06	; prescaler 256
sts tccr2b, temp

lds temp, 0x01	; overflow interrupt enable
sts TIMSK2, temp

...temp is normal register r16.

Should I first write the data to sram and then mov sram content to register? I'm a bit confused here with this extended thing.

Regards
heguli

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Those LDS's need to be LDI's !

(unless you were very lucky and RAM location 0 held 0, location 6 held 6 and location 1 held 1)

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lot of activity now :D
Thanks clawson!

Regards
heguli