An Exact Question...

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When we say CPU puts a memory address on memory bus. What exactly happens ?

 

When we say CPU fetch instruction from memory. How exactly it does ?

 

I request answer in terms of flow of current, voltages going up down and switches getting flipped. 'puts' and 'fetches' are hiding some secrets behind it. smiley I am searching for an answer of ancient era.

 

Can someone help ?

Viren Chocha.... (what's up, doc ?)

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Before delving into computer architecture, it helps to know the basics of digital logic. That would answer your questions about voltages and currents. Once you know the difference between a RS and a D flip flop, then you can progress to more complex sequential circuits. I think one of the classic texts on digital logic is by Tocci. There should be a copy on the interwebs.
A good source of low level information on processor designs is the technical manuals for the likes of pdp8, pdp11 and nova cpus. These were built out of discrete ttl ics. Some more advanced reading is a book on the cdc6600 by Thornton. The cdc6600was built of of nearly half a million transistors and was the world's fastest computer in the 1960's. It only consumed 150kW of power!

Note- your question is far from exact. Concepts like a memory bus can take many forms.

Last Edited: Sat. Feb 4, 2017 - 08:10 AM
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You could look at a datasheet for one of the old, smaller memories, which tend to show the full logic involved.

For example, the 7489 was a 64bit (16 lines by 4 bits) TTL RAM: www.syntax.com.tw/upload/pdf/IC-7489.pdf

Each "bit" is a flip-flop cell, and the 4 incoming address lines are used to decode which "row" of flipflops is selected, by exhaustively decoding each possible value with 4-input AND gates.

(so row 5 is ~A3 & A2 & ~A1 & A0); select a row and the flipflop outputs show up on the output pins.  Clock the "Write" signal, and the data on the input pins gets loaded into the flipflops.

Modern bigger memories work essentially the same way.  But with lots more address inputs (and bigger AND gates (or equivalents)), and with various mechanisms used to simplify and shrink the flipflop down as small as possible.  (I think the smallest static ram cell is 6 transistors.  DRAM and FLASH cells are much smaller, and use fewer transistors.)

 

If you don't understand terms like "flipflop" and "and gate", then you need to start back a few steps and learn about those first.

 

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CPUs are just arrays of transistors at the end of the day. The path through the transistor ("gate") is either open (1) or closed (0) so that current can/can't flow to the output. A group of such transistors can form a "latch" (flip-flop) that holds such 0/1 states. If you have a group of 8 or 16 (or more) of these you could produce a group of 0s and 1s that actually select an address to be accessed. There are common descriptions of memory arrays as a collection of pigeon holes where a particular storage box is identified by how far up and how far across it is in the matrix. That up/across could be represented as the 0s and 1s that are held on those latches I just described. 

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As others have strongly hinted, in an AVR, not to mention most microcontrollers,

the buses mentioned are mostly internal.

You will not be able to measure them with a voltmeter.

AN AVR has at least four buses and I expect five or more:

SRAM

flash

EEPROM

R0...R31

I/O registers

I expect they are done differently.

"SCSI is NOT magic. There are *fundamental technical
reasons* why it is necessary to sacrifice a young
goat to your SCSI chain now and then." -- John Woods

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Hey cyberspider....

 

You wrote:

When we say CPU puts a memory address on memory bus. What exactly happens ?

I will pedantically correct you on this one: The CPU puts an address on the address buss and then uses that address to load or store data from a memory location to or from a register. Since you have access to the absolutely and fantastically well indexed and complete repository of information ever assembled in the history of this planet at your fingertips I suggest you do a search on www.google.com for the term "basic cpu architecture", this should lead you to a search for "harvard architecture" or " von neuman architecture". That's the best advice I can offer right now. 

 

 

 

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At the level that the OP appears to be asking, there is no simple answer. Even for these most basic operations, thousands of transistors turn on and off. Are we to describe the operation of every one of these things? I "know" to the level that I want to "know" which is close to zilch at the transistor level. The most important thing is the smart people have figured these things out and they work.

 

Tell me, do you know the details at this level about how your car works when you press the brake pedal? Really, including the "booster" and the "anti-lock braking"? Now, how about the transmission? Every gear, valve, actuator, bearing, and such? Really?

 

The OP may think that this is an "exact question", but an exact answer would take up a significant fraction of the space that already exists on this forum.

 

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

Last Edited: Sat. Feb 4, 2017 - 11:56 PM
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A software guy will give an exact answer, whereas a hardware guy will say 'between these two extremes'!

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Thats because its not a software question!

 

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Exactly!