E70 - QSPI QCS remains asserted

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I want to use the QSPI interface in full QSPI mode via the XDMAC.

 

So far I have configured:

  1. the QSPI for serial memory transfer in full QSPI mode
  2. XDMAC channels for Tx as well as Rx tranfsers (memory to memory)
  3. ISR for XDMAC to handle channel interrupts

 

I can send and receive data via the QSPI, but within the XDMAC_Handler I have to manually set the QSPI_CR.LASTXFER bit in order to get the QCS (QSPI chip select) de-asserted. Otherwise it would remain asserted.

 

Is there some configuration missing, in order to get the QCS line automatically de-asserted after the XDMAC transfer completed?

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Last Edited: Thu. Nov 3, 2016 - 07:36 AM
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I think I finally found the answer to it.

 

The datasheet states in 41.6.5.2: "When data transfer is enabled, the user must indicate when the data transfer is completed in the QSPI memory space by setting QSPI_CR.LASTXFR."

 

Meaning you have to manually set the flag, even though the transfer has been performed by XDMAC ...

The same thing is done in the Atmel ASF example QSPI XIP.