Does the XMEGA TWI master always set RIF after SLA+R?

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I've seen posts with polling loops that look something like this:
...
TWIC.MASTER.ADDR=(address<<1)|0x01; //enter MR mode
//wait for data
while (!(TWIC.MASTER.STATUS & TWI_MASTER_RIF_bm));
*data++=TWIC.MASTER.DATA; //read data
...

Question
If the I2C slave device is unpowered and does not ACK the address, could the while loop go on forever, or is the RIF bit always set? Are there other bits that could/should be checked while waiting?

Background
The X256A3 datasheet says, "If the master receives an ACK from the slave, the master proceeds receiving the next byte of data from the slave. [and paraphrasing, sets RIF and clears RXACK]." Unfortunately, the datasheet does not say what happens if the slave does not ACK the SLA+R.

Thanks.

Field the chicken, ignore the ball.

Last Edited: Thu. Jul 12, 2012 - 08:22 PM
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Oops! I completely missed the datasheet's mention of what happens if the slave does not ACK the address packet - it sets WIF and RXACK. I think if you are writing your own Neandarcode I2C polling routines(like mine), and the device is powered from a different supply than the XMega, you'll want something like:

//wait for RIF (data ready to read) or WIF (problem)
while(!(twi->MASTER.STATUS&(TWI_MASTER_RIF_bm|TWI_MASTER_WIF_bm)));

Then just check for which one was indicated and either proceed (RIF), or give up(WIF).

Thanks for listening.

Field the chicken, ignore the ball.