Does SPI cancel I/O on unused SPI port pins?

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Hello,

I am having some difficulty understanding the SPI on the 8515/8535 devices. I'm using an ICE200 to emulate an 8515 and will port the ap to a Mega161 when it works.

I am sending data to a 10-bit DAC (MAX515). The DAC format is two bytes:
first byte is 4 bits low - bits 9,8,7,6
second byte is bits 5,4,3,2,1,0 - two low bits.

I initialize the SPI with the code from the data sheet:

ldi temp, (1<<DD_MOSI) | (1<<DD_SCK) ; PB5 and PB7 are outputs
out DDR_SPI, temp ; port b
ldi temp, (1<<SPE) | (1<<MSTR) ; enable SPI as MASTER at Fclk/4
out SPCR, temp ; SPI control register

and, in order to get the SPI to work, the SS pin must be set low:

sbi DDRB, SS ; SS (PB4) set as output
cbi portb, SS ; DAC chip select pulled low
out SPDR, DACone ; start SPI transfer

pollSPI_0: sbis SPSR, SPIF
rjmp pollSPI_0 ; poll until finished

This is done twice with the two formatted bytes containing the DAC value.
The DAC displays the correct voltage, so the procedure must be correct. After sending the second byte,
the SS is brought high and made an input.

sbi portb, SS
cbi DDRB, SS

However, my problem is that I can't use any of the other PortB I/O pins for output.
Setting any of the pins in Port B as outputs in DDRB and then setting or clearing the Port B register bit has no effect. CBI/SBI doesn't work, nor does EOR.

Is it a possibly undocumented characteristic of PortB to not have I/O control of the pins when the SPI is enabled?
Or, more likely, am I missing something obvious?

Thank you

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Quote:
Is it a possibly undocumented characteristic of PortB to not have I/O control of the pins when the SPI is enabled?

It is a documented characteristic of PortB to not have I/O control of some of the pins when the SPI is enabled.
It is also a documented characteristic that you do not want the SS pin to be an input when the SPI is enabled as a master unless you know exactly why you are doing that and what the consequences are.
Please study the data sheet some more.
Dave Raymond

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Quote:
However, my problem is that I can't use any of the other PortB I/O pins for output.

I haven’t used the Mega161, but on other Megas I have not had any problems like that while using SPI.
The rest of the pins on PORTB do have alternate functions, are you using any of those systems?

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The problem is the code that initializes the DDR of the SPI pins.
I shouldn't be using 'LDI' because it sets all the unreferenced port bits to
inputs after the desired port bit was set to an output in previous code:

The lines ---
ldi temp, (1<<DD_MOSI) | (1<<DD_SCK)
out DD_SPI, temp

should be changed to ---

in temp, DD_SPI
ori temp, (1<<DD_MOSI) | (1<<DD_SCK)
out DD_SPI, temp

Using the ORI instruction to set the desired bits will keep the previous data bit structure intact in the register.
Sad that even after years of experience these things still occasionally slip by.