Documentation for SAME70 NVICIABR register?

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I'm trying to debug an issue on a SAME70 processor. It's getting stuck in Dummy_Handler() which is the default interrupt handler for unused IRQs. I would like to know how it got there.

There is a bit set in NVICIABR1 (NVIC interrupt active bit register) which should indicate which interrupt occurred. However, I can't find any documentation for this register. Is there somewhere I can look to find out which interrupt this bit corresponds to?

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It looks like the bits in the NVICIABRx registers line up with the "peripheral identifiers" in table 14-1 of the datasheet.