if somebody is interested then the info needed to make 'software only'
AVR JTAGICE is now placed into public domain!
So anyone who wants to write their own software (ICE) can use that info
to communicate with AVR On Chip Debug core - using the previously
'undocumented' AVR JTAG Instructions 8,9,A,B.
All the info on the refenced link is based on the info that has been in
the public domain previously. Also all the info on that info page has been
verified to work with real AVR silicon (an ATmega16 connected to Xilinx
Parallel Cable III - "LPT connected JTAG Interface").
there is also an open source project aimed to create a free AVR JTAGICE
software (no software is yet published).
as long as an opensource (or free) AVR JTAGICE is not yet avaialble the
info can also be used to implement a DEBUG monitor using the OCDR register
exampe how to write to AVR register and read back over JTAG is also on the
link page referenced :)