I have seen some posts where it shows a delay after the CH0IF flag is set (signalling conversion complete) and before reading CH0RES.
I can't seem to find anything about this is the datasheet but I could also have missed it.
At the moment I have 1ms which is huge, maybe it only needs a few nops?? Any pointer in any of the datasheet please?
If it matters the ADC is running at 125KHz.