Dedicated hardware RS232 to SDI-12 controller?

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Hello--

I've been reading the book "Principles of Electrical Measurement" by Sławomir Tumański, and on page 399, the author mentions that it is possible to create a bridge between RS232C and the SDI-12 protocol using what appears to be a specialized IC.

I am wondering if such an IC is available, or if it would be possible to implement SDI-12 using the RX and TX pins of a USART shorted together.

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The TX signal would need to be open collector - that is it can only pull down. Just connecting the TX and RX together would mean that the TX signal would oppose any change for the RX. I think a bit of Googling should give you a schematic.

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Sure, sounds good, Kartman. I agree that TX would have to be attached to an open collector non-inverting buffer.

An example schematic can be found at the www.sdi-12.org website in the SDI-12 spec document. However, the standard doesn't really deal with how the transceiver should be wired up. I think that the open collector approach is a very viable idea.

I can't seem to find anything else by Googling around. SDI-12 is a protocol standard, so some programming is required to ensure compliancy.

However, I would hope that there would be some ready-made IC available to bridge between RS-232 and SDI-12. I know that modules do indeed exist, but I was hoping for some sort of IC which could be easily incorporated into a circuit.

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You CAN use 74LCX125 to do it on a micro serial port. It hooks to the Rx and Tx pins and one "direction" control pin from the micro. Nothing much more needed beyond that.

Incidentally, very little of the actual SDI-12 uses 12V any more. Its often 5V. The specs, however, say nothing about that detail. It depends on the manufacturer.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Thanks, Jim. Yes, all is needed is something such as a 74LCX125. After that, it simply becomes an exercise in loading and offloading data from the serial port, and toggling a PIO to set data direction.

How do you deal with a "break" at the beginning of the data transmission? Would you use an interrupt, or does this show up as received data on the USART?

BTW, we mostly use Campbell Scientific, so the voltage levels are indeed 5V for SDI-12. The 12V line is still being used to power the sensor, through.

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You cannot create a break with the UART because of the start and stop bits. It needs to be at least 12ms long. At 1200 baud, you have 0.83ms per bit. So that is about 14.5 bits. That means you have to do it "manually" by turning the Tx pin back into a general IO pin and set it to the desired level for at least 12ms.

I do know that some loggers do not provide 12V (Decagon, I believe, is one) and may not use 5V as the logic high level. I have not checked on the SDI-12 specs for Campbell recently, even though I use them with SDI-12 peripherals.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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What about slave devices on the SDI-12 bus? I'm using SDI-12 for a slave device, and I think that in a similar fashion to a master, the RX pin must be turned into a GPIO. The next step is to set up an interrupt on that particular pin. When the data recorder (master) sends a "break" along the bus, set up a timer to run for at least 12 milliseconds, and then switch the RX pin over to UART.

According to the spec, SDI-12 uses "negative logic." (At least, this is what is shown in Table 1.) I would assume that this means that SDI-12 has inverted logic levels? Would I require an inverter on the bus?

Then again, Figure 3 of the spec shows a "break" sent from the master as being logic high.

Thanks, Jim.

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Right, you will have to use something other than the UART to detect the presence of a break. That means running the Rx pin as a GPIO pin.

A UART outputs a logic high during idle. The SDI-12 diagram shows logic low, So, you need an inversion on Rx and one on Tx.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Thanks again, Jim. What is the exact part that you've used as a buffer/inverter to be able to communicate over the SDI-12 bus?

I would assume that SDI-12 idles logic low, and is active logic high?

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Right, on the second point.

I don't have SDI-12 operational. It will prototype very soon.

There are some games you can play according to the normal logic input as well as the state control pin to do some nifty things. For example, you can turn it into an non-inverting "open collector" device by putting your logic signal into one of the /OE pins and tie the corresponding logic input to low. So, when /OE is low, the device is active and the output is low; when /OE is high, it is tristate.

If you use a pull-down rather than a pull-up resistor, you can make it invert. Put your logic signal into /OE and tie the regular input high.

I was going to use TI 1G family but it looks like I made an error in my design (no inversion where one is needed) and I am not exactly sure what I am going to use.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Thanks, Jim. It's neat to hear about the things that you can do with the /OE pin.

I've located the uOS++ project on SourceForge. This is an operating system for AVR with built-in SDI-12 support.

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Didn't realize that was there. I'll check it out.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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It might be useful to ensure full compliance with the SDI-12 standard. I didn't know about it either until a short while ago!

http://sourceforge.net/projects/...

There is an example for SDI-12 in the examples directory of the distribution.

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Well, I took a look at it and don't have much use for schedulers and such, but there might be a kernel of useful information.

Thanks
Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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It could probably be used as a "hardware" RS-232 to SDI-12 bridge. Another AVR or AVR32 would handle most of the processing associated with a sensor.

A CPLD or FPGA could also be used to do SDI-12. A bit of Verilog code would be suitable, I think. Then if mass production is required, the logic could be re-made as an ASIC. The ASIC could communicate with the host processor via RS-232 or SPI.

However, it is probably simplest to implement SDI-12 exactly how you have suggested, Jim - with a buffer on the serial port of a microcontroller. The only challenge is ensuring that the slave implementation is compliant with all data recorders. That's the reason why some standard code/hardware is necessary - to allow re-use of ideas.

In reality, the SDI-12 standards committee should provide a "reference implementation."

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One of the version documents for SDI-12 has the schematic for a suggested hardware interface. I don't see a software reference design as being very useful but a state diagram or flow chart would help, a whole bunch.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Yes, I agree that better documentation would be extremely useful, Jim.

I just can't shake the feeling that the SDI-12 specs need a re-write. I agree that a flow chart would indeed help.

Now where is my pen to sign a petition?

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I didnt bother to read the whole thread, but Ive made a device for my country's water and energy department using sdi-12. I simply used a tristate buffer with TX always enabled and RX controleld by an I/O pin. Signal needs to be inverted though, as sdi-12 use inverted logic.

I connected the RX pin to INT0 too, through a small cap in order to wake up the AVR from power down sleep mode.

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Thanks, I am beginning to go that direction myself.

The big issue is that there are VERY few inverting tristate buffers available. It is even more difficult when your processor is 3.3V and SDI-12 requires 5V. The receive side is not much problem. It is the transmit side that is a challenge.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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ka7ehk wrote:
Thanks, I am beginning to go that direction myself.

The big issue is that there are VERY few inverting tristate buffers available. It is even more difficult when your processor is 3.3V and SDI-12 requires 5V. The receive side is not much problem. It is the transmit side that is a challenge.

Jim

Youre right, there are very few inverting tristates around, i looked for ages until i found one that also had a low quiscent (i know i probably spelled that horribly wrong) current draw. I could look up which one i ended up ordering if youre interested.

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That would be a big help. I have looked at TI, On, and Fairchild. Not yet at NXP, ST, etc.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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I ended up using the NXP HEF50098B (http://pdf1.alldatasheet.com/datasheet-pdf/view/17670/PHILIPS/HEF40098B.html). Hope this helps!

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Thanks. I'lll check that out right away!

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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I just found the 74LVC2G240 which would be nice except for the fact that the SDI-12 output levels on the transmit side are 0/5V which requires that the chip run from 5V. Then, the receive-side output level into the 3.3V processor Rx pin is too high AND the Tx pin high logic level is insufficient.

The HEF4098 would work nicely in a 5V-only system that does not need SMT. I had almost forgotten about the now (almost) ancient 40xx CMOS logic family!

Somewhere (TI or NXP, maybe) I know I have seen level translators with two Vcc pins. Gotta keep looking.

Thanks
Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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I haven't really been following this thread so forgive me if I am off base. I noticed Jim's reference to 2 Vcc pins. We use this:

http://search.digikey.com/script...

edit: Never mind, after looking back at previous posts I see you are looking for an inverting buffer.

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Hmm..

I do need to go back and look at TI more. There are two, maybe three, issues at play, here.

(1) Industrial-strength conversion between 3.3V processor and 5V bus in two directions (receive and transmit)

(2) Inversion required between UART Tx and Rx and the bus (as in RS232)

3) Tristate output needed on transmit but NOT on receive (or settable independently) so that the device can be awakened by a transition on the bus.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Have you seen this line of products:

http://www.onsemi.com/PowerSolut...

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Missed those!

Thanks,
Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Drats -

Very few allow down shifting on a receive channel and upshifting on a transmit channel. The single gate ones have a max recommended Vcc of 4.5V with an absolute max of 5.5V. Not happy running those continuously at 5V.

I am beginning to think that I may need separate translators for Rx and Tx (since one is translate down and the other is translate up) and a third 1-gate to provide the tristate function.

So, I am still looking. And looking. But thanks for the great suggestions!

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Well, this is what I am doing:

(1) Use an ADG3301 or similar part to convert between voltage levels (3.3V on USART to 5V). This is a bi-directional voltage level shifting IC. So I don't think that direction is an issue.

(2) Use a dual inverter to invert the RX/TX signals after these signals have been level-shifted by the ADG3301. The inverter operates at 5V levels.

(3) Use an NC7WZ1254 tri-state buffer on the output of the inverters. This tri-state buffer is connected to the SDI-12 output bus.

Does this appear to be a good way to proceed? There is the additional complexity of using three ICs.

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Off topic:
I guess I must not be spending enough time browsing semiconductor websites :-) ...I wouldn't have guessed to check out Analog Devices for a level translation chip.

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Nor, I. But I am heading there, right now.

There are bidirectional level shifters from other sources, including TI. However, they are pretty expensive - mfr listing shows $0.80 in 1K quantities. This compares to a single gate non-inverting level shifter in mfr list at $0.18 @ 1K.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

Last Edited: Wed. Aug 26, 2009 - 06:45 PM
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You could try one of the "configurable" little-logic parts from TI.

http://focus.ti.com/docs/prod/fo...

Won't help you with combining TX & RX into a single part, but should allow you to have an inverting tristated buffer for the TX. Then a simple LL inverting buffer for RX is all that is needed. It would also allow you to use a 2nd I/O for driving a BREAK condition on the line, without having to twiddle with the USART config.

Writing code is like having sex.... make one little mistake, and you're supporting it for life.

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Yeah, the TI logic is really exciting stuff. Thx glitch!

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Hmmmm -

Something else missed at TI!

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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whups, just noticed the part I linked to is not 5V tolerant. Unfortunately it is also the only one with tristate output.

So I guess your best option is 3 LL parts, 2 inverters and one buffer with an output enable.

Ok here is my final solution for you, this combo should work.

Dual inverter for TX/RX: SN74LVC2GU04 running at 3.3V (5V tolerant inputs)

Tristate Buffer for Tx: SN74AHCT1G126 running at 5V (Vih min is 2V, so 3V3 logic should drive it fine)

Writing code is like having sex.... make one little mistake, and you're supporting it for life.

Last Edited: Wed. Aug 26, 2009 - 07:34 PM
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I remember, now, the problem with the bidrectional level shifters. No inversion.

I'd grumble but go with three parts (two level-shifting inverters, one tristate buffer) but 5 is too much (both real-estate and cost) on board that is already tight on both.

Oh, one of the gotchas in all this is that the tri-state buffer needs to be 5V powered. Guess what logic levels the enable requires? @#$^$W^%$

This seems like such a simple problem, and amazing that a reasonable combination of parts seems so hard to find.

All of this is getting to the point that I may just use the cheapest logic level FETs I can find and make my own "inverters". After all, this is only 1200 baud so speed is not much of an issue.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Jim, see my edit above - and only 2 chips. [you posted while I was editing]

Writing code is like having sex.... make one little mistake, and you're supporting it for life.

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Ahh...

Had just gotten to the 1G126 and had not caught that the AHCT had such a low Vh value. That is great. A mere $0.40 from DigiKey in quantity = 1, $0.09 in 3K.

That dual is nice, also. Running at 3.3V, the Tx inverter outputs 0/3.3V which is acceptable by the tristate buffer so its function is inversion, only. On the Rx side, the input is 5V tolerant, so it behaves well receiving on the SDI-12 bus. It is also $0.40 in quantity of 1 and $0.11 @ 3K from DigiKey. So, it won't break the bank.

Thanks for you help. I was beginning to wonder if there was any reasonable solution to this, at all.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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No problem. I saw it as a challenge, and I love a good challenge. Luckily I'm quite familiar with the LL parts from TI, as I use them for these types of applications regularly, so I was positive there was a working solution in there somewhere. I'm sure there are solutions from other vendors as well. But for a $0.80 USD solution in single piece quantity, you can't really feel motivated to look further ;)

Writing code is like having sex.... make one little mistake, and you're supporting it for life.

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I agree and the help is really appreciated. Now, I go home this eve, rip up a bit of Eagle layout, create a couple of new parts, and have at it.

Thanks
Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Now my solution was to use the ADG3304 bi-directional voltage level shifting IC to also provide 5V logic level enables for the tri-state buffer, as well as logic shifting for the RX/TX.

But I do agree that glitch came up with a really nice solution to this challenge.

Our thread should be archived on the SDI-12 website. The SDI-12 committee really needs some better hardware suggestions.

This is one of these threads that I print out and keep in a binder. It's bound to become a classic.

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Well in that case, I expect royalties! ;)

Good luck with it Jim, let me know how it works out.

Writing code is like having sex.... make one little mistake, and you're supporting it for life.

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Thanks for your help, glitch! I'll try this out as well too. :D