ddrc & A/D problem

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After much messing around, I got a meg48 A/D up and running. on PC0 (AD0) Apparently the channel bit for DDRC must be set to 0. When the DDRC bit is set to 1, it seems that the A/D never finishes the conversion (ADSC must stay high)

I set things as follows:
clr temp
sts prr, temp
sts adcsrb, temp
ldi temp, $C0
sts admux, temp
ldi temp, $3E
sts didr0, temp
clr temp2
clr xl
clr xh
more_adc: ldi temp, $C6
sts adcsra, temp ;start conversion
wait_adc: nop
lds temp, adcsra
sbrc temp, 6 ;check ADSC
rjmp wait_adc
lds xl, adcl
lds xh, adch

Apparently when DDRCis $FF it never finishes (hangs), but if DDRC is $FE, all is well---why is that (or is there something being overlooked)

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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I've never thought of doing an A/D conversion on a pin configured as an output. I don't know why the conversion wouldn't complete.

I guess the short answer is to only try A/D conversions on pins configured as inputs. The state of an output pin can be determined (in most cases) by reading the state of the PORT or PIN.


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I've never met a pig I didn't like, as long as you have some salt and pepper.

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Here is something that I wrote a month ago for Mega8:




ldi buf,$47 ; 0 1 0 x | 0 1 1 1
out admux,buf ;Selecting AVCC as a reference for ADC
;Selecting Channel 7 as a signal source

ldi buf,$86 ; 1 0 0 x | 0 1 1 0
out adcsra,buf ;bit7=1 => Enable ADC
;bit6=0 => No Conversion
;bit5=0 => Single conversion mode
;bit4=x => Interrupt Flag
;bit3=0 => ADC Interrupt disable
;bit2,1,0=110 => ADC Prescaler=64
; => ADC clock=4MHz/64= 62.5KHz





in buf,adcsra
ori buf,$40
out adcsra,buf ;bit6=1 => START ADC CONVERSION


in buf,adcsra
sbrc buf,6
rjmp wait_adc_conversion

in adc_l,adcl
in adc_h,adch ;Reading the voltage



It works. I hope this will help you somehow!