Can't get the Cortex-M7 DWT cycle-counter to run on the SAME70 Xplained board.
(DWT is Data Watchpoint and Trace). The set up sequence is as follows: /* Enable CPU Cycle counting */ /* Global Enable for DWT */ CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; /* Reset the counter */ DWT->CYCCNT = 0; /* Enable cycle counter */ DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; From this point on, the DWT->CYCCNT register should be counting. Looking at register DWT->CTRL, it looks like the enable did not take. It's behaving as if the DWT block is not clocked. Reg DWT->CTRL remains at its 'reset' value of 0x40000000. Expecting 0x40000001. (fyi DWT_CTRL_CYCCNTENA_Msk has the value 1 (i.e. bit 0)) Q: What is the complete sequence to enable the SAME70 Cortex-M7 DWT block for the part?