Connecting SRAM I/O pins to AVR

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I am adding an SRAM chip HM62256ALP-10 (32k x 8) to a project using a MEGA16L as in interface between another uC.

Since the I/O lines on the SRAM can be input or output, should I use a resistor on each line? I am using 5V logic levels so I am thinking 470ohm resistors to protect both the memory chip and the mega16L. Correct?

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Many years since I connected SRAM to my AVR (many pins to connect :D), but I don't recall using any resistors.
Why not use serial flash?

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??? Why wouldn't you use an AVR that already has built-in external memory interface? Yes I know it can be done with a Mega16, but wouldn't one of the ready-made solutions give you a better "product" with near-single-cycle transparent operation?

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Just out of interest, if the SRAM is shared what are you doing to avoid contention?

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" Why wouldn't you use an AVR that already has built-in external memory interface?"

Because i did not know one existed. Is there one that interfaces to this SRAM chip?

"]Why not use serial flash?"

Endurance and write cycle time. Unless i am reading the datasheet wrong, it says Status Register Write Cycle Time is 40 to 100 ms

Other reasons...

Mostly though because I bought some of these memory chips a while back and I am just learning to use them. i thought I would make a simple 2 wire interface to the Basic Stamp using shiftin and shiftout commands to create banks of memory to store data during program execution.

Just because I can't think of anything else to build at the moment, otherwise I just have to sit and watch TV.

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AT90S8515 had interface to SRAM but they are kind of outdated. Well anything is better than to be stuck in front of TV-screen.

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Serial flash may have access speed and write cycle problems but FRAM from RamTron doesn't!

The Atmel parametric selector will help you identify which ones support a parallel external SRAM interface if you want to pursue that route.

Cliff

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metron9 wrote:
" Why wouldn't you use an AVR that already has built-in external memory interface?"

Because i did not know one existed.

The ATmega162, mega8515, mega128 definitely have external SRAM support. Don't know about your chip though. You'll need a latch as well as the memory chip (but no resistors - see diagrams in datasheet).

If you want to see what someone else has done - albeit for the older form of 8515, try this link
http://www.myplace.nu/avr/dram/index.htm)

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stk200 had SRAM onboard. If you can find a schematic of that board you can see how Atmel did it

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See the 'bus interfacing' section of the sample chapter...

http://www.oreilly.com/catalog/dbhardware/chapter/ch06.pdf

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I have decided not to use the SRAM. It works fine but just too many connections.

It seems I have a few atmel 4M 8-SOIC chips. I could not get it to work for quite a while so I thought I would insert another chip in the holder and then I could see my problem, OOPS I had a tiny13 chip in the holder. Darn type is so small I can't hardly see it with a magnifier. So I got the status byte command working for now. By the way I am using a 3.3V regulator and driving the SI,SCK,CS with 5V logic. I am using the 3.3V to hold the RESET high.

I do have a question though on the AT45DB041B-SC atmel dataflash. After reading the data sheet it says:

"10,000 cumulative page erase/program
operations is specified in the 4M Serial
DataFlash data sheet as the maximum
number of cumulative reprogram operations
that can occur to other pages within the
same sector before each page of the
DataFlash sector must be rewritten."

I am not sure what this does. Does it rewrite / clear memory to zero? or refresh the data stored in each page. How many times can this operation be done?

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Quote:
The schematic to support incircuit programming is shown in Figure 6-9. Note that
MOSI on the connector goes to MISO on the processor, and similarly MISO goes to
MOSI on the processor. This is because, during programming, the processor is a
slave and not a master

I just read this on page 14 of the oreilly book linked referring to attiny15. I've never used that chip but is that something specific to that chip. On the mega chips I've used, I connect MISO on the programmer to MISO on the chip etc. Maybe I'm getting my wires crossed or something.

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The warning about AT45 write cycle life is as follows...

Flash memory holds a charge on a gate. When you program a single bit it can change the state from '1' to '0' but you cannot change '0' to '1' in a single bit/byte access.

Instead the AT45s are made up of 264/528 byte pages (though you can also use as 256/512 bytes too). To change any bit from '0' to '1' within the 2048/4096 bits in a page you MUST erase the entire page by setting every bit in every byte to '1' so, after an erase the entire page will be full of bytes holding 0xFF.

Every time you do such an erase cycle you wear out the page a little. Each page (so block of 264/528 bytes) in the device can only be guaranteed to be eraseable 10,000 times.

To combat this the code you write in the AVR to control the AT45 may use a technique known as "wear spreading" where it sequentially works through the chip using page after page for writes to spread the wear so that no individual page is written more than any other. Otherwise, say you always just used 256 bytes in page 0 and repeatedly wrote, erased, wrote that one page the device would effectively be unuseable while there were still hundreds/thousands of other pages in the device that you hadn't yet touched.

So you may need plan your strategy as to how you organise the data in the chip if it's going to be written a lot (like a data logger?)

One REALLY nice solution (as I already mentioned above) for unlimited erase/writes, byte accessiblity, non-volatility and virtually no write/erase delays (well hugely smaller than AT45 Dataflash) is to use FRAM from RamTron though there's obviously a price penalty to enjoy such luxuries:

http://www.ramtron.com/doc/Produ...

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Quote:
I have decided not to use the SRAM. It works fine but just too many connections

I warned you :D

There are EEPROM that can do 1 million writes.
http://www.elfa.se/pdf/73/739/07...
There are also similar with SPI interface.
The ones larger than 64Kbit are 100.000 writes.
http://www.elfa.se/pdf/73/739/07...
Best thing to do if you want 1M writes is to use a number of the small ones. May be larger with 1M writes that I am not aware of. :D

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If you have a project that needs external ram, you can just buy a board with an avr and the ram on it ready to program.... priio has one. Because of the address latch this should really be designed into the circuit board to make it neat

Imagecraft compiler user

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There are also SRAM chips that look like serial EEPROM chips, but only contain a few hundred bytes or so. I2C interface. Up to gazillion writes.

- Jani