conf_clock.h is different in different Examples (ASF3.27)

Go To Last Post
5 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I am trying to learn how to program SAMC21 Xplained Pro.

 

I found that the conf_clock.h file is different between the two examples: GETTING-STARTED and CAN_QUICK_START.

 

here is the diff file:

 

52c52
< #  define CONF_CLOCK_FLASH_WAIT_STATES            0
---
> #  define CONF_CLOCK_FLASH_WAIT_STATES            3
56,57c56,57
< #  define CONF_CLOCK_OSC48M_FREQ_DIV              SYSTEM_OSC48M_DIV_12
< #  define CONF_CLOCK_OSC48M_ON_DEMAND             true
---
> #  define CONF_CLOCK_OSC48M_FREQ_DIV              SYSTEM_OSC48M_DIV_1
> #  define CONF_CLOCK_OSC48M_ON_DEMAND             false
74c74
< #  define CONF_CLOCK_XOSC32K_ENABLE               false
---
> #  define CONF_CLOCK_XOSC32K_ENABLE               true
79,80c79,80
< #  define CONF_CLOCK_XOSC32K_ON_DEMAND            true
< #  define CONF_CLOCK_XOSC32K_RUN_IN_STANDBY       false
---
> #  define CONF_CLOCK_XOSC32K_ON_DEMAND            false
> #  define CONF_CLOCK_XOSC32K_RUN_IN_STANDBY       true
98,100c98,100
< #  define CONF_CLOCK_DPLL_ENABLE                  false
< #  define CONF_CLOCK_DPLL_ON_DEMAND               true
< #  define CONF_CLOCK_DPLL_RUN_IN_STANDBY          false
---
> #  define CONF_CLOCK_DPLL_ENABLE                  true
> #  define CONF_CLOCK_DPLL_ON_DEMAND               false
> #  define CONF_CLOCK_DPLL_RUN_IN_STANDBY          true
126,127c126,127
< #  define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY        false
< #  define CONF_CLOCK_GCLK_0_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC48M
---
> #  define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY        true
> #  define CONF_CLOCK_GCLK_0_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_DPLL
132,134c132,134
< #  define CONF_CLOCK_GCLK_1_ENABLE                false
< #  define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY        false
< #  define CONF_CLOCK_GCLK_1_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC48M
---
> #  define CONF_CLOCK_GCLK_1_ENABLE                true
> #  define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY        true
> #  define CONF_CLOCK_GCLK_1_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_XOSC32K
181c181
< #  define CONF_CLOCK_GCLK_8_ENABLE                false
---
> #  define CONF_CLOCK_GCLK_8_ENABLE                true

 

 

NOTE: with CONF_CLOCK_FLASH_WAIT_STATES            0  the cpu will not run at 48MHz.

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Is there a question? With CAN you generally need to have a crystal to meet the bit timing requirements.

 

Basically the difference between the examples is:

 

GETTING-STARTED

Uses the internal 48MHz oscillator divided by 12 so the CPU is running at 4MHz with 0 wait states for the flash

 

CAN_QUICK_START

Uses the external 32KHz crystal with the DPLL to configure it to run at 48MHz divided by 1 so the CPU is running at 48MHz with 3 wait states for the flash. I would assume the CAN peripheral is also clocked at 48MHz.

 

Last Edited: Fri. Sep 18, 2015 - 02:38 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Thanks, I am trying to learn about the clock system.

 

I am still misunderstanding some parts.

 

I tried to modify conf_boards.h so that I could run at 48MHz from the internal OCS48Mhz.  After programming the system runs at 48MHz, but after a reset (push reset button) it doesn't run.  Also the debugger doesn't work.

 

/**
 * \file John's from R26
 *
 * \brief SAM C21 Clock configuration
 *
 * Copyright (C) 2015 Atmel Corporation. All rights reserved.
 *
 * \asf_license_start
 *
 * \page License
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 *    this list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 *    this list of conditions and the following disclaimer in the documentation
 *    and/or other materials provided with the distribution.
 *
 * 3. The name of Atmel may not be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * 4. This software may only be redistributed and used in connection with an
 *    Atmel microcontroller product.
 *
 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * \asf_license_stop
 *
 */
/*
 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
 */
#include <clock.h>

#ifndef CONF_CLOCKS_H_INCLUDED
#  define CONF_CLOCKS_H_INCLUDED

/* System clock bus configuration */
#  define CONF_CLOCK_FLASH_WAIT_STATES            3
#  define CONF_CLOCK_CPU_DIVIDER                  SYSTEM_MAIN_CLOCK_DIV_1

/* SYSTEM_CLOCK_SOURCE_OSC48M configuration - Internal 48MHz oscillator */
#  define CONF_CLOCK_OSC48M_FREQ_DIV              SYSTEM_OSC48M_DIV_1
#  define CONF_CLOCK_OSC48M_ON_DEMAND             true
#  define CONF_CLOCK_OSC48M_RUN_IN_STANDBY        false

/* SYSTEM_CLOCK_SOURCE_XOSC configuration - External clock/oscillator */
#  define CONF_CLOCK_XOSC_ENABLE                  false
#  define CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL        SYSTEM_CLOCK_EXTERNAL_CRYSTAL
#  define CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY      12000000UL
#  define CONF_CLOCK_XOSC_STARTUP_TIME            SYSTEM_XOSC_STARTUP_32768
#  define CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL       true
#  define CONF_CLOCK_XOSC_ON_DEMAND               true
#  define CONF_CLOCK_XOSC_RUN_IN_STANDBY          false
#  define CONF_CLOCK_XOSC_FAILURE_DETECTOT_PRE    SYSTEM_CLOCK_XOSC_FAILURE_DETECTOR_PRESCALER_1
#  define CONF_CLOCK_XOSC_FAILURE_DETECTOT_EVENT_OUTPUT_EANBLE  false
#  define CONF_CLOCK_XOSC_FAILURE_DETECTOT_EANBLE  false
#  define CONF_CLOCK_XOSC_FAILURE_SWITCH_BACK_EANBLE  false

/* SYSTEM_CLOCK_SOURCE_XOSC32K configuration - External 32KHz crystal/clock oscillator */
#  define CONF_CLOCK_XOSC32K_ENABLE               false
#  define CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL     SYSTEM_CLOCK_EXTERNAL_CRYSTAL
#  define CONF_CLOCK_XOSC32K_STARTUP_TIME         SYSTEM_XOSC32K_STARTUP_65536
#  define CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT    false
#  define CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT  true
#  define CONF_CLOCK_XOSC32K_ON_DEMAND            true
#  define CONF_CLOCK_XOSC32K_RUN_IN_STANDBY       false
#  define CONF_CLOCK_XOSC32K_FAILURE_DETECTOT_PRE    SYSTEM_CLOCK_XOSC32K_FAILURE_DETECTOR_PRESCALER_1
#  define CONF_CLOCK_XOSC32K_FAILURE_DETECTOT_EVENT_OUTPUT_EANBLE  false
#  define CONF_CLOCK_XOSC32K_FAILURE_DETECTOT_EANBLE  false
#  define CONF_CLOCK_XOSC32K_FAILURE_SWITCH_BACK_EANBLE  false



/* SYSTEM_CLOCK_SOURCE_OSC32K configuration - Internal 32KHz oscillator */
#  define CONF_CLOCK_OSC32K_ENABLE                false
#  define CONF_CLOCK_OSC32K_STARTUP_TIME          SYSTEM_OSC32K_STARTUP_130
#  define CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT    true
#  define CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT   true
#  define CONF_CLOCK_OSC32K_ON_DEMAND             true
#  define CONF_CLOCK_OSC32K_RUN_IN_STANDBY        false


/* SYSTEM_CLOCK_SOURCE_DPLL configuration - Digital Phase-Locked Loop */
#  define CONF_CLOCK_DPLL_ENABLE                  false
#  define CONF_CLOCK_DPLL_ON_DEMAND               true
#  define CONF_CLOCK_DPLL_RUN_IN_STANDBY          false
#  define CONF_CLOCK_DPLL_LOCK_BYPASS             false
#  define CONF_CLOCK_DPLL_WAKE_UP_FAST            false
#  define CONF_CLOCK_DPLL_LOW_POWER_ENABLE        false

#  define CONF_CLOCK_DPLL_LOCK_TIME               SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_DEFAULT
#  define CONF_CLOCK_DPLL_REFERENCE_CLOCK         SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K
#  define CONF_CLOCK_DPLL_FILTER                  SYSTEM_CLOCK_SOURCE_DPLL_FILTER_DEFAULT
#  define CONF_CLOCK_DPLL_PRESCALER               SYSTEM_CLOCK_SOURCE_DPLL_DIV_1


#  define CONF_CLOCK_DPLL_REFERENCE_FREQUENCY     32767
#  define CONF_CLOCK_DPLL_REFEREMCE_DIVIDER       1
#  define CONF_CLOCK_DPLL_OUTPUT_FREQUENCY        48000000

/* DPLL GCLK reference configuration */
#  define CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR GCLK_GENERATOR_1
/* DPLL GCLK 32K reference configuration */
#  define CONF_CLOCK_DPLL_REFERENCE_GCLK_32K_GENERATOR GCLK_GENERATOR_1

/* Set this to true to configure the GCLK when running clocks_init. If set to
 * false, none of the GCLK generators will be configured in clocks_init(). */
#  define CONF_CLOCK_CONFIGURE_GCLK               true

/* Configure GCLK generator 0 (Main Clock) */
#  define CONF_CLOCK_GCLK_0_ENABLE                true
#  define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY        true
#  define CONF_CLOCK_GCLK_0_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC48M
#  define CONF_CLOCK_GCLK_0_PRESCALER             1
#  define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE         false

/* Configure GCLK generator 1 */
#  define CONF_CLOCK_GCLK_1_ENABLE                false
#  define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY        false
#  define CONF_CLOCK_GCLK_1_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC48M
#  define CONF_CLOCK_GCLK_1_PRESCALER             1
#  define CONF_CLOCK_GCLK_1_OUTPUT_ENABLE         false

/* Configure GCLK generator 2  */
#  define CONF_CLOCK_GCLK_2_ENABLE                false
#  define CONF_CLOCK_GCLK_2_RUN_IN_STANDBY        false
#  define CONF_CLOCK_GCLK_2_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC48M
#  define CONF_CLOCK_GCLK_2_PRESCALER             1
#  define CONF_CLOCK_GCLK_2_OUTPUT_ENABLE         false

/* Configure GCLK generator 3 */
#  define CONF_CLOCK_GCLK_3_ENABLE                false
#  define CONF_CLOCK_GCLK_3_RUN_IN_STANDBY        false
#  define CONF_CLOCK_GCLK_3_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC48M
#  define CONF_CLOCK_GCLK_3_PRESCALER             1
#  define CONF_CLOCK_GCLK_3_OUTPUT_ENABLE         false

/* Configure GCLK generator 4 */
#  define CONF_CLOCK_GCLK_4_ENABLE                false
#  define CONF_CLOCK_GCLK_4_RUN_IN_STANDBY        false
#  define CONF_CLOCK_GCLK_4_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC48M
#  define CONF_CLOCK_GCLK_4_PRESCALER             1
#  define CONF_CLOCK_GCLK_4_OUTPUT_ENABLE         false

/* Configure GCLK generator 5 */
#  define CONF_CLOCK_GCLK_5_ENABLE                false
#  define CONF_CLOCK_GCLK_5_RUN_IN_STANDBY        false
#  define CONF_CLOCK_GCLK_5_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC48M
#  define CONF_CLOCK_GCLK_5_PRESCALER             1
#  define CONF_CLOCK_GCLK_5_OUTPUT_ENABLE         false

/* Configure GCLK generator 6 */
#  define CONF_CLOCK_GCLK_6_ENABLE                false
#  define CONF_CLOCK_GCLK_6_RUN_IN_STANDBY        false
#  define CONF_CLOCK_GCLK_6_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC48M
#  define CONF_CLOCK_GCLK_6_PRESCALER             1
#  define CONF_CLOCK_GCLK_6_OUTPUT_ENABLE         false

/* Configure GCLK generator 7 */
#  define CONF_CLOCK_GCLK_7_ENABLE                false
#  define CONF_CLOCK_GCLK_7_RUN_IN_STANDBY        false
#  define CONF_CLOCK_GCLK_7_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC48M
#  define CONF_CLOCK_GCLK_7_PRESCALER             1
#  define CONF_CLOCK_GCLK_7_OUTPUT_ENABLE         false

/* Configure GCLK generator 8 */
#  define CONF_CLOCK_GCLK_8_ENABLE                false
#  define CONF_CLOCK_GCLK_8_RUN_IN_STANDBY        false
#  define CONF_CLOCK_GCLK_8_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC48M
#  define CONF_CLOCK_GCLK_8_PRESCALER             1
#  define CONF_CLOCK_GCLK_8_OUTPUT_ENABLE         false
#endif /* CONF_CLOCKS_H_INCLUDED */



 

Last Edited: Fri. Sep 18, 2015 - 05:00 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hello,

 

is there any solution for the reset problem? I can send Data vie UART at a Baudrate of 3000000 but only once. Then it get stucked. It would be very nice if someone can help me. It is my firs microcontroller I am working with.

 

Best Regards

 

Makoja

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hi, 

 

your reset problem is due to the fact that the C21 Rev B is a piece of shit. 

 

You need to do a hardware reset aka power reset. You can remove the alimentation jumper and put it back in to reset. That is why debug will not work because when it trys to reset, the clocks fail !

 

Also, you will notice that de FDPLL96 does not work. I just received Rev C and FDPLL does not work eider. 

 

Good luck !