code compatability between chips of the same family

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Our code written for the ATTiny 84 will fit within the code space and ram usage of an ATTiny24. It is compiled using Atmel Studio 6 and AVRGCC. Are there differences in the linker and the compiled code for the three chips. Ie: will code compiled for an ATTiny84 run properly on an ATTiny24 or an ATTiny44 or must the code be compiled specifically for each chip.

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Its a big, firm, "all depends".

Some families, such as the Mega48/88/etc have different boot spaces as well as RAM and ROM sizes. One of the differences caused by bootloader size differences is different ISR vector locations. This could cause big problems; reading the spec sheet on the Tiny24/44/84 should show whether or not this is an issue.

Generally, within a family, the register naming, the bit naming, and the functionality remains constant. I cannot think of a counter-example, but there probably is at least one. So, generally, code compiled for a smaller one in a family will work in a larger one (if ISR vector locations are compatible), but not the other way around.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Quote:

Ie: will code compiled for an ATTiny84 run properly on an ATTiny24 or an ATTiny44 or must the code be compiled specifically for each chip.

Let's try this quick test to address your question...get a code listing for your ATtiny84 app and find a sequence similar to

                 ;STACK POINTER INITIALIZATION
00003d edef      	LDI  R30,LOW(0xDF)
00003e bfed      	OUT  SPL,R30

It may use the RAMEND constant. For your Tiny84 with 512 bytes of SRAM, there is something like ".equ RAMEND = 0x025f" floating about. For a Tiny44, it would be 0x15f.

So, consider what would happen in a Tiny44 the first time a stack operation is done when the starting stack pointer is located 256 bytes beyond available SRAM space? Then consider EEPROM and flash operations as well.

You probably can build for the '24 and use on '44 and '84.

Perhaps you are golden as the unused bits in SPL/SPH wouldn't take any effect on the smaller '24. But what about the SPH operation itself? What happens when you write to SPH on a Tiny24?

Quote:
Note that the data space in some implementations of the AVR architecture is so small that only SPL is needed. In this case, the SPH Register will not be present.

(Why fight it? Build for the smallest family member. And/or rebuild for each. Probably the same source file; just different build outputs.)

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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This makes sense. Our situation is that the BOM specified one of the 3 parts and purchasing got quantities of all 3.Of course the firmware was built for the 84. I've tested by building for the 24 and it runs on the 84. It seems that as long as I'm within the ram restraints of the smallest chip I should be OK. We have the same potential situation with another board using an ATMega168p/328p. We are testing code built for the 168p on boards using ther 328p

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I guess the Mega168p 329p and 648p are the same chip. The only difference is probably the amount of ram, eeprom and flash. I know that is true for the Mega169p family. I run the same code in each.